linux-kernel - [tip:perf/core] blackfin, perf: Use common PMU interrupt disabled code

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Message-ID: <tip-6e316f9c19a088586fd9ae058f9ea35b271571f3@git.kernel.org>
Date:	Thu, 19 Jun 2014 05:37:28 -0700
From:	tip-bot for Vince Weaver <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, paulus@...ba.org, hpa@...or.com,
	mingo@...nel.org, peterz@...radead.org, acme@...nel.org,
	vincent.weaver@...ne.edu, realmz6@...il.com, tglx@...utronix.de
Subject: [tip:perf/core] blackfin, perf:
  Use common PMU interrupt disabled code

Commit-ID:  6e316f9c19a088586fd9ae058f9ea35b271571f3
Gitweb:     http://git.kernel.org/tip/6e316f9c19a088586fd9ae058f9ea35b271571f3
Author:     Vince Weaver <vincent.weaver@...ne.edu>
AuthorDate: Sun, 15 Jun 2014 02:01:58 -0400
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Wed, 18 Jun 2014 18:43:45 +0200

blackfin, perf: Use common PMU interrupt disabled code

Transition to using the new generic PERF_PMU_CAP_NO_INTERRUPT method for
failing a sampling event when no PMU interrupt is available.

Signed-off-by: Vince Weaver <vincent.weaver@...ne.edu>
Signed-off-by: Peter Zijlstra <peterz@...radead.org>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Paul Mackerras <paulus@...ba.org>
Cc: Steven Miao <realmz6@...il.com>
Cc: adi-buildroot-devel@...ts.sourceforge.net
Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1406150200360.16738@vincent-weaver-1.umelst.maine.edu
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/blackfin/kernel/perf_event.c | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/arch/blackfin/kernel/perf_event.c b/arch/blackfin/kernel/perf_event.c
index 974e554..ea20320 100644
--- a/arch/blackfin/kernel/perf_event.c
+++ b/arch/blackfin/kernel/perf_event.c
@@ -389,14 +389,6 @@ static int bfin_pmu_event_init(struct perf_event *event)
 	if (attr->exclude_hv || attr->exclude_idle)
 		return -EPERM;
 
-	/*
-	 * All of the on-chip counters are "limited", in that they have
-	 * no interrupts, and are therefore unable to do sampling without
-	 * further work and timer assistance.
-	 */
-	if (hwc->sample_period)
-		return -EINVAL;
-
 	ret = 0;
 	switch (attr->type) {
 	case PERF_TYPE_RAW:
@@ -490,6 +482,13 @@ static int __init bfin_pmu_init(void)
 {
 	int ret;
 
+	/*
+	 * All of the on-chip counters are "limited", in that they have
+	 * no interrupts, and are therefore unable to do sampling without
+	 * further work and timer assistance.
+	 */
+	pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
+
 	ret = perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW);
 	if (!ret)
 		perf_cpu_notifier(bfin_pmu_notifier);
--
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