linux-kernel - [tip:perf/core] metag, perf: Use common PMU interrupt disabled code

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Message-ID: <tip-1b92722fafe2003e49ec904f33c0020ade36bd16@git.kernel.org>
Date:	Thu, 19 Jun 2014 05:37:41 -0700
From:	tip-bot for Vince Weaver <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, paulus@...ba.org, hpa@...or.com,
	mingo@...nel.org, james.hogan@...tec.com, peterz@...radead.org,
	acme@...nel.org, vincent.weaver@...ne.edu, tglx@...utronix.de
Subject: [tip:perf/core] metag, perf:
  Use common PMU interrupt disabled code

Commit-ID:  1b92722fafe2003e49ec904f33c0020ade36bd16
Gitweb:     http://git.kernel.org/tip/1b92722fafe2003e49ec904f33c0020ade36bd16
Author:     Vince Weaver <vincent.weaver@...ne.edu>
AuthorDate: Sun, 15 Jun 2014 02:03:13 -0400
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Wed, 18 Jun 2014 18:43:45 +0200

metag, perf: Use common PMU interrupt disabled code

Transition to using the new generic PERF_PMU_CAP_NO_INTERRUPT method for
failing a sampling event when no PMU interrupt is available.

Signed-off-by: Vince Weaver <vincent.weaver@...ne.edu>
Acked-by: James Hogan <james.hogan@...tec.com>
Signed-off-by: Peter Zijlstra <peterz@...radead.org>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Paul Mackerras <paulus@...ba.org>
Cc: linux-metag@...r.kernel.org
Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1406150202050.16738@vincent-weaver-1.umelst.maine.edu
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/metag/kernel/perf/perf_event.c | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/arch/metag/kernel/perf/perf_event.c b/arch/metag/kernel/perf/perf_event.c
index 5cc4d4d..02c0873 100644
--- a/arch/metag/kernel/perf/perf_event.c
+++ b/arch/metag/kernel/perf/perf_event.c
@@ -568,16 +568,6 @@ static int _hw_perf_event_init(struct perf_event *event)
 		return -EINVAL;
 
 	/*
-	 * Early cores have "limited" counters - they have no overflow
-	 * interrupts - and so are unable to do sampling without extra work
-	 * and timer assistance.
-	 */
-	if (metag_pmu->max_period == 0) {
-		if (hwc->sample_period)
-			return -EINVAL;
-	}
-
-	/*
 	 * Don't assign an index until the event is placed into the hardware.
 	 * -1 signifies that we're still deciding where to put it. On SMP
 	 * systems each core has its own set of counters, so we can't do any
@@ -866,6 +856,15 @@ static int __init init_hw_perf_events(void)
 	pr_info("enabled with %s PMU driver, %d counters available\n",
 			metag_pmu->name, metag_pmu->max_events);
 
+	/*
+	 * Early cores have "limited" counters - they have no overflow
+	 * interrupts - and so are unable to do sampling without extra work
+	 * and timer assistance.
+	 */
+	if (metag_pmu->max_period == 0) {
+		metag_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
+	}
+
 	/* Initialise the active events and reservation mutex */
 	atomic_set(&metag_pmu->active_events, 0);
 	mutex_init(&metag_pmu->reserve_mutex);
--
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