linux-kernel - [tip:perf/core] sh, perf: Use common PMU interrupt disabled code

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Message-ID: <tip-a10d60c08cc3bbea9195e2b36440f557373623eb@git.kernel.org>
Date:	Thu, 19 Jun 2014 10:39:54 -0700
From:	tip-bot for Vince Weaver <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, paulus@...ba.org, hpa@...or.com,
	mingo@...nel.org, peterz@...radead.org, acme@...nel.org,
	vincent.weaver@...ne.edu, tglx@...utronix.de
Subject: [tip:perf/core] sh, perf: Use common PMU interrupt disabled code

Commit-ID:  a10d60c08cc3bbea9195e2b36440f557373623eb
Gitweb:     http://git.kernel.org/tip/a10d60c08cc3bbea9195e2b36440f557373623eb
Author:     Vince Weaver <vincent.weaver@...ne.edu>
AuthorDate: Sun, 15 Jun 2014 02:06:15 -0400
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Thu, 19 Jun 2014 19:37:51 +0200

sh, perf: Use common PMU interrupt disabled code

Transition to using the new generic PERF_PMU_CAP_NO_INTERRUPT method for
failing a sampling event when no PMU interrupt is available.

Signed-off-by: Vince Weaver <vincent.weaver@...ne.edu>
Signed-off-by: Peter Zijlstra <peterz@...radead.org>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Paul Mackerras <paulus@...ba.org>
Cc: linux-sh@...r.kernel.org
Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1406150205300.16738@vincent-weaver-1.umelst.maine.edu
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/sh/kernel/perf_event.c | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c
index 0233167..7cfd7f1 100644
--- a/arch/sh/kernel/perf_event.c
+++ b/arch/sh/kernel/perf_event.c
@@ -129,14 +129,6 @@ static int __hw_perf_event_init(struct perf_event *event)
 		return -ENODEV;
 
 	/*
-	 * All of the on-chip counters are "limited", in that they have
-	 * no interrupts, and are therefore unable to do sampling without
-	 * further work and timer assistance.
-	 */
-	if (hwc->sample_period)
-		return -EINVAL;
-
-	/*
 	 * See if we need to reserve the counter.
 	 *
 	 * If no events are currently in use, then we have to take a
@@ -392,6 +384,13 @@ int register_sh_pmu(struct sh_pmu *_pmu)
 
 	pr_info("Performance Events: %s support registered\n", _pmu->name);
 
+	/*
+	 * All of the on-chip counters are "limited", in that they have
+	 * no interrupts, and are therefore unable to do sampling without
+	 * further work and timer assistance.
+	 */
+	pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
+
 	WARN_ON(_pmu->num_events > MAX_HWEVENTS);
 
 	perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW);
--
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