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Message-ID: <20140701142201.GU7959@redhat.com>
Date: Tue, 1 Jul 2014 10:22:01 -0400
From: Don Zickus <dzickus@...hat.com>
To: Andi Kleen <ak@...ux.intel.com>
Cc: "HATAYAMA, Daisuke" <d.hatayama@...fujitsu.com>, hpa@...or.com,
matt@...sole-pimps.org, peterz@...radead.org, acme@...nel.org,
mingo@...hat.com, paulus@...ba.org, tglx@...utronix.de,
x86@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] perf/x86/intel: ignore CondChgd bit to avoid false
NMI handling
On Mon, Jun 30, 2014 at 03:22:24PM -0700, Andi Kleen wrote:
> >
> > I'm also interested in the behaviour of CondChgd bit on Ivy Bridge processors.
>
> The intended meaning of CondChgd is that a hardware debugger has taken over the
> PMU. It shouldn't really be set in other circumstances.
Interesting. My concern is we have customers that can soft reboot a
machine and have this bit accidentally be enabled. I am pretty sure they
do not have a hardware debugger attached (I would have to double check).
Is there other ways this can be set?
Cheers,
Don
>
> I think right now for perf it would be best to just ignore it.
>
> In theory could stop using the PMU, but if some BIOS set it it would
> completely disable perf there. So better to just ignore it.
>
> -Andi
>
> --
> ak@...ux.intel.com -- Speaking for myself only
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