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Message-Id: <20140702.100714.29478419.d.hatayama@jp.fujitsu.com>
Date: Wed, 02 Jul 2014 10:07:14 +0900 (JST)
From: HATAYAMA Daisuke <d.hatayama@...fujitsu.com>
To: ak@...ux.intel.com
Cc: hpa@...or.com, dzickus@...hat.com, matt@...sole-pimps.org,
peterz@...radead.org, acme@...nel.org, mingo@...hat.com,
paulus@...ba.org, tglx@...utronix.de, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] perf/x86/intel: ignore CondChgd bit to avoid false
NMI handling
From: Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH v2] perf/x86/intel: ignore CondChgd bit to avoid false NMI handling
Date: Mon, 30 Jun 2014 15:22:24 -0700
>>
>> I'm also interested in the behaviour of CondChgd bit on Ivy Bridge processors.
>
> The intended meaning of CondChgd is that a hardware debugger has taken over the
> PMU. It shouldn't really be set in other circumstances.
>
Thanks for your explanation.
The hardware debugger you mean is a kind of ITP?
> I think right now for perf it would be best to just ignore it.
>
> In theory could stop using the PMU, but if some BIOS set it it would
> completely disable perf there. So better to just ignore it.
>
I'll reflect this information in the patch description.
--
Thanks.
HATAYAMA, Daisuke
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