linux-kernel - Re: [PATCH v2] devicetree: Add generic IOMMU device tree bindings

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Message-ID: <53BC95DA.1010500@codeaurora.org>
Date:	Tue, 08 Jul 2014 18:07:38 -0700
From:	Olav Haugan <ohaugan@...eaurora.org>
To:	Will Deacon <will.deacon@....com>
CC:	Mark Rutland <Mark.Rutland@....com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>, Arnd Bergmann <arnd@...db.de>,
	Pawel Moll <Pawel.Moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Grant Grundler <grundler@...omium.org>,
	Joerg Roedel <joro@...tes.org>,
	Stephen Warren <swarren@...dotorg.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Marc Zyngier <Marc.Zyngier@....com>,
	Linux IOMMU <iommu@...ts.linux-foundation.org>,
	Rob Herring <robh+dt@...nel.org>,
	Thierry Reding <thierry.reding@...il.com>,
	Kumar Gala <galak@...eaurora.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	Cho KyongHo <pullip.cho@...sung.com>,
	Dave P Martin <Dave.Martin@....com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Hiroshi Doyu <hdoyu@...dia.com>, mitchelh@...eaurora.org
Subject: Re: [PATCH v2] devicetree: Add generic IOMMU device tree bindings

On 6/30/2014 2:52 AM, Will Deacon wrote:
> Hi Olav,
> 
> On Fri, Jun 27, 2014 at 11:23:27PM +0100, Olav Haugan wrote:
>> On 6/25/2014 2:18 AM, Will Deacon wrote:
>>> Why can't it be dynamically detected? Whilst the StreamIDs are fixed in
>>> hardware (from the SMMU architecture perspective), the SMRs are completely
>>> programmable. Why doesn't something like Andreas's proposal work for you?
>>> The idea there was to find the constant bits among the StreamIDs for a
>>> master and create the mask accordingly.
>>>
>> Lets say I have an IOMMU with 2 masters and 2 SMRn slots with the
>> following stream IDs coming from the masters:
>>
>> Master 1: 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28
>> Master 2: 0x30
>>
>> To make this work I would program SMR[0] with StreamID 0x20 and mask 0xF
>> to ignore lower 4 bits. SMR[1] would just be StreamID 0x30 with mask 0x0.
>>
>> However, I could also have an IOMMU with 2 masters and 9 SMRn slots with
>> the following stream IDs:
>>
>> Master 1: 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28
>> Master 2: 0x29
>>
>> Here I would program all SMRn and leave the mask to be 0 for all SMRn's.
>> So how do I detect when to apply a mask or not?
> 
> You would aim to use the smallest number of SMRs per master possible.
> You could probably use:
> 
>   Master 1: SMR[0].id == 0x20, SMR[0].mask = 0x07
>             SMR[1].id == 0x28, SMR[1].mask = 0x00
> 
>   Master 2: SMR[2].id == 0x29, SMR[2].mask = 0x00

So how does an algorithm figure this out in both my examples? The
algorithm would have to know about both (all) bus masters and their
stream IDs for a specific SMMU. If the algorithm operates on the set of
stream IDs for one bus master at a time the algorithm has no way of
knowing which bits can be ignored since it doesn't know the value of the
other stream IDs for the other bus masters and thus could potentially
create a mask that could cause a stream ID to match in two different
entries.

>> I am not familiar with Andreas's proposal. Do you have a link?
> 
>   http://marc.info/?l=linux-arm-kernel&m=139110598005846&w=2

Unless I am mistaken the algorithm works on one bus master at a time. I
don't think that will work.

Thanks,

Olav Haugan

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