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Date:	Thu, 10 Jul 2014 14:20:07 +0530
From:	Harini Katakam <harinik@...inx.com>
To:	broonie@...nel.org, grant.likely@...aro.org, robh+dt@...nel.org,
	pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
	dwmw2@...radead.org, computersforpeace@...il.com, marex@...x.de,
	artem.bityutskiy@...ux.intel.com, geert+renesas@...ux-m68k.org,
	s.hauer@...gutronix.de, jg1.han@...sung.com, sourav.poddar@...com
Cc:	michals@...inx.com, punnaia@...inx.com,
	harinikatakamlinux@...il.com, Harini Katakam <harinik@...inx.com>
Subject: [RFC PATCH 2/2] devicetree: Add devicetree bindings documentation for Zynq QSPI

Add bindings documentation for Zynq QSPI driver.

Signed-off-by: Harini Katakam <harinik@...inx.com>
---
 .../devicetree/bindings/spi/spi-zynq-qspi.txt      |   28 ++++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt b/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
new file mode 100644
index 0000000..288c551
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
@@ -0,0 +1,28 @@
+Xilinx Zynq QSPI controller Device Tree Bindings
+-------------------------------------------------
+
+Required properties:
+- compatible		: Should be "xlnx,zynq-qspi-1.0".
+- reg			: Physical base address and size of QSPI registers map.
+- interrupts		: Property with a value describing the interrupt
+			  number.
+- interrupt-parent	: Must be core interrupt controller
+- clock-names		: List of input clock names - "ref_clk", "pclk"
+			  (See clock bindings for details).
+- clocks		: Clock phandles (see clock bindings for details).
+
+Optional properties:
+- num-cs		: Number of chip selects used.
+- xlnx,qspi-mode	: Single - 0; Dual Stacked - 1; Dual Parallel - 2.
+
+Example:
+	qspi@...0d000 {
+		compatible = "xlnx,zynq-qspi-1.0";
+		clock-names = "ref_clk", "pclk";
+		clocks = <&clkc 10>, <&clkc 43>;
+		interrupt-parent = <&intc>;
+		interrupts = <0 19 4>;
+		num-cs = <1>;
+		xlnx,qspi-mode = <0x0>;
+		reg = <0xe000d000 0x1000>;
+	} ;
-- 
1.7.9.5

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