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Message-ID: <1405475714-10006-1-git-send-email-huayi.li@csr.com>
Date: Wed, 16 Jul 2014 09:55:10 +0800
From: Huayi Li <huayi.li@....com>
To: Thierry Reding <thierry.reding@...il.com>,
<linux-pwm@...r.kernel.org>,
Grant Likely <grant.likely@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>
CC: <linux-arm-kernel@...ts.infradead.org>, <workgroup.linux@....com>,
<rongjun.ying@....com>, <barry.song@....com>,
Huayi Li <huayi.li@....com>
Subject: [PATCH v5 0/4] PWM: add and enable CSR SiRFSoC PWM driver
Changes in v5:
- select the best source clock which can be divided to a more
accurate PWM clock
- only enable PWM clock and its source clock when needed
Changes in v3:
- v4: fix many issues from Thierry's feedbacks
Changes in v3:
- add "depends on" COMPILE_TEST according to Arnd's feedback;
- move the pwm clock source to dts according to Arnd's feedback;
- add lost dt-binding document
Changes in v2:
- clean the source clock of PWM wave, use OSC(26MHz)
Huayi Li (4):
pwm: add CSR SiRFSoc PWM driver
pwm: sirf: add dt-binding document
ARM: dts: sirf: fix the pwm-cells and clocks
ARM: prima2_defconfig: enable PWM and sirf PWM driver
Documentation/devicetree/bindings/pwm/pwm-sirf.txt | 29 ++
arch/arm/boot/dts/atlas6.dtsi | 8 +-
arch/arm/boot/dts/prima2.dtsi | 8 +-
arch/arm/configs/prima2_defconfig | 2 +
drivers/pwm/Kconfig | 10 +
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-sirf.c | 450 +++++++++++++++++++++
7 files changed, 504 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sirf.txt
create mode 100644 drivers/pwm/pwm-sirf.c
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