linux-kernel - RE: [PATCH v5 3/5] PCI: designware: enhance dw_pcie_host

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Message-ID: <2CC2A0A4A178534D93D5159BF3BCB661A47A2A83BB@EAPEX1MAIL1.st.com>
Date:	Thu, 17 Jul 2014 12:18:11 +0800
From:	Mohit KUMAR DCG <Mohit.KUMAR@...com>
To:	Murali Karicheri <m-karicheri2@...com>,
	"Jingoo Han (jg1.han@...sung.com)" <jg1.han@...sung.com>
Cc:	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Santosh Shilimkar <santosh.shilimkar@...com>,
	Russell King <linux@....linux.org.uk>,
	Grant Likely <grant.likely@...aro.org>,
	Rob Herring <robh+dt@...nel.org>,
	Jingoo Han <jg1.han@...sung.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Richard Zhu <r65037@...escale.com>,
	Kishon Vijay Abraham I <kishon@...com>,
	Marek Vasut <marex@...x.de>, Arnd Bergmann <arnd@...db.de>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Randy Dunlap <rdunlap@...radead.org>,
	Pratyush ANAND <pratyush.anand@...com>
Subject: RE: [PATCH v5 3/5] PCI: designware: enhance dw_pcie_host_init() to
 support v3.65 DW hardware



> -----Original Message-----
> From: Pratyush ANAND
> Sent: Thursday, July 17, 2014 9:07 AM
> To: Murali Karicheri
> Cc: linux-pci@...r.kernel.org; linux-kernel@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; Santosh Shilimkar; Russell King; Grant Likely; Rob
> Herring; Mohit KUMAR DCG; Jingoo Han; Bjorn Helgaas; Richard Zhu; Kishon
> Vijay Abraham I; Marek Vasut; Arnd Bergmann; Pawel Moll; Mark Rutland;
> Ian Campbell; Kumar Gala; Randy Dunlap
> Subject: Re: [PATCH v5 3/5] PCI: designware: enhance dw_pcie_host_init()
> to support v3.65 DW hardware
> 
> On Thu, Jul 17, 2014 at 12:38:04AM +0800, Murali Karicheri wrote:
> > keystone PCI controller is based on v3.65 designware hardware. This
> > version differs from newer versions of the hardware in few functional
> > areas discussed below that makes it necessary to change
> > dw_pcie_host_init() to support v3.65 based PCI controller.
> >
> >  1. No support for ATU port. So any ATU specific resource handling code
> >     is to be bypassed for v3.65 h/w.
> >  2. MSI controller uses Application space to implement MSI and 32 MSI
> >     interrupts are multiplexed over 8 IRQs to the host. Hence the code
> >     to process MSI IRQ needs to be different. This patch allows platform
> >     driver to provide its own irq_domain_ops ptr to irq_domain_add_linear()
> >     through an API callback from the designware core driver.
> >  3. MSI interrupt generation requires EP to write to the RC's application
> >     register. So enhance the driver to allow setup of inbound access to
> >     MSI irq register as a post scan bus API callback.
> >
> > Signed-off-by: Murali Karicheri <m-karicheri2@...com>
> 
> Looks almost ok to me.
> 
> Reviewed-by: Pratyush Anand <pratyush.anand@...com>
> 

- Now looks fine to me.

Acked-by: Mohit KUMAR <mohit.kumar@...com>

Jingoo,
After Murali's patches,  dw code can be used by  older Synopsys controller based driver too.
Pls have a look at the series if you have any further comment.

Thanks
Mohit

> >  int __init dw_pcie_host_init(struct pcie_port *pp)  {
> >  	struct device_node *np = pp->dev->of_node;
> > -	struct of_pci_range range;
> >  	struct of_pci_range_parser parser;
> > +	struct of_pci_range range;
> 
> You may avoid moving the above line.
> 
> ~Pratyush
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