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Message-ID: <20140723222640.GA28485@lunn.ch>
Date: Thu, 24 Jul 2014 00:26:40 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Benoit Masson <benoitm@...enite.com>
Cc: Andrew Lunn <andrew@...n.ch>, Jason Cooper <jason@...edaemon.net>,
benoitm974 <yahoo@...enite.com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Russell King <linux@....linux.org.uk>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Gregory CLEMENT <gregory.clement@...e-electrons.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...glemail.com>
Subject: Re: [PATCH 1/2] Added dts defintion for Lenovo ix4-300d nas
> Both phy are :
> marvell,88e1318
I don't have the datasheet for this specific phy model, but i do have
the datasheet for another similar phy.
> example of a minimal reg write that lead MPP24 to shutdown instead
> of rebooting on original BSP driver
> XXXXX BasicInit
I'm assuming regOffs is decimal, and data is hex?
> phyAdr 0: regOffs: 16 data: 3
Copper Specific control register. 3 means Polarity Reversal Disable &
Jabber function disable.
> phyAdr 0: regOffs: 10 data: 830
Reg 10 is the 1000BASE-T Status register, which is read only!
So this is not making much sense. Are we missing some changes to the
page register? Register 16 of page 3 is the LED control register.
Andrew
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