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Date:	Thu, 7 Aug 2014 14:47:21 +0200 (CEST)
From:	Jiri Kosina <>
To:	Pavel Machek <>
cc:	"Rafael J. Wysocki" <>,
	Linux-pm mailing list <>,
	kernel list <>,
	Chris Wilson <>,
	intel-gfx <>
Subject: Re: 3.15-rc: regression in suspend

On Fri, 11 Jul 2014, Pavel Machek wrote:

> > > > Ok, so I have set up machines for ktest / autobisect, and found out that 
> > > > 3.16-rc1 no longer has that problem. Oh well, bisect would not be fun, 
> > > > anyway...
> > > 
> > > I am still seeing the problem with 3.16-rc2.
> > 
> > I'm confused now. Is the bisect result
> > 
> > commit 773875bfb6737982903c42d1ee88cf60af80089c
> > Author: Daniel Vetter <>
> > Date:   Mon Jan 27 10:00:30 2014 +0100
> > 
> >     drm/i915: Don't set the 8to6 dither flag when not scaling
> > 
> > now the culprit or not? Or do we have 2 different bugs at hand here?
> Three different issues, it seems. Two ring initialization problems,
> one went away in 3.16 (for me), second did not (suspend for jikos),
> third -- trivial issue with 8to6 dither.

The patch below seems to finally cure the problem at my system; I've just 
attached it to freedesktop bugzilla, but sending it to this thread as well 
to hopefully get as much testing coverage by affected people as possible.

I am going on with testing whether it really completely fixes the problem 
or just made it less likely.

From: Jiri Kosina <>
Subject: [PATCH] drm/i915: read HEAD register back in init_ring_common() to enforce ordering

Withtout this, ring initialization fails reliabily during resume with

	[drm:init_ring_common] *ERROR* render ring initialization failed ctl 0001f001 head ffffff8804 tail 00000000 start 000e4000

Signed-off-by: Jiri Kosina <>
 drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 279488a..7add7ee 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -517,6 +517,9 @@ static int init_ring_common(struct intel_engine_cs *ring)
+	/* Enforce ordering by reading HEAD register back */
+	I915_READ_HEAD(ring);
 	/* Initialize the ring. This must happen _after_ we've cleared the ring
 	 * registers with the above sequence (the readback of the HEAD registers
 	 * also enforces ordering), otherwise the hw might lose the new ring

Jiri Kosina
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