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Date:	Thu, 7 Aug 2014 14:54:41 +0200 (CEST)
From:	Jiri Kosina <jkosina@...e.cz>
To:	Pavel Machek <pavel@....cz>
cc:	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	Linux-pm mailing list <linux-pm@...ts.osdl.org>,
	kernel list <linux-kernel@...r.kernel.org>,
	Chris Wilson <chris@...is-wilson.co.uk>,
	intel-gfx <intel-gfx@...ts.freedesktop.org>
Subject: Re: 3.15-rc: regression in suspend

On Thu, 7 Aug 2014, Jiri Kosina wrote:

> The patch below seems to finally cure the problem at my system; I've just 
> attached it to freedesktop bugzilla, but sending it to this thread as well 
> to hopefully get as much testing coverage by affected people as possible.
> 
> I am going on with testing whether it really completely fixes the problem 
> or just made it less likely.

Okay, after 31 suspend-resume cycles, the problem appeared again (while 
without the patch, it triggers with 100% reliability). So it's not a 
complete fix, it just makes the problem much less visible.

Going back to bugzilla discussion.

> 
> From: Jiri Kosina <jkosina@...e.cz>
> Subject: [PATCH] drm/i915: read HEAD register back in init_ring_common() to enforce ordering
> 
> Withtout this, ring initialization fails reliabily during resume with
> 
> 	[drm:init_ring_common] *ERROR* render ring initialization failed ctl 0001f001 head ffffff8804 tail 00000000 start 000e4000
> 
> Signed-off-by: Jiri Kosina <jkosina@...e.cz>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 279488a..7add7ee 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -517,6 +517,9 @@ static int init_ring_common(struct intel_engine_cs *ring)
>  	else
>  		ring_setup_phys_status_page(ring);
>  
> +	/* Enforce ordering by reading HEAD register back */
> +	I915_READ_HEAD(ring);
> +
>  	/* Initialize the ring. This must happen _after_ we've cleared the ring
>  	 * registers with the above sequence (the readback of the HEAD registers
>  	 * also enforces ordering), otherwise the hw might lose the new ring

-- 
Jiri Kosina
SUSE Labs
--
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