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Message-ID: <20140811195659.GG3935@laptop>
Date: Mon, 11 Aug 2014 21:56:59 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Stephane Eranian <eranian@...gle.com>
Cc: linux-kernel@...r.kernel.org, mingo@...e.hu, ak@...ux.intel.com
Subject: Re: [PATCH v2 0/4] perf/x86: simplify PEBS event constraint
management
On Mon, Aug 11, 2014 at 09:27:09PM +0200, Stephane Eranian wrote:
> This patchkit revamps the PEBS tables on most Intel CPUs, both simplifying
> and fixing a couple of problems on Haswell processors:
> - All PEBS event supported
> - data address and data source is now reported correctly for all events
>
> We simplify the tables by using the fact that non-PEBS event when used
> in PEBS mode do not generate any PEBS records , thus they are safe to use.
> This helps simplify the PEBS event constraints because they do not need
> to list all suported PEBS events anymore. They only need to list
> the special PEBS events, such as precise store and load latency.
> This avoid some issues where the kernel is missing some PEBS events.
>
> In V2, we cleanup some more the precise_datala() for store events.
Ah, I just queued your v1, time to swap patches around I suppose :-)
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