linux-kernel - Re: [PATCH] perf/x86/intel: Mark initialization code as such

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Message-ID: <CA+rthh9pON6MOL7bY9hxL29TRAoxaS=co-g4gn2mb6F9gjSLDQ@mail.gmail.com>
Date:	Sun, 7 Sep 2014 19:47:13 +0200
From:	Mathias Krause <minipli@...glemail.com>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Paul Mackerras <paulus@...ba.org>,
	Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>
Cc:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Mathias Krause <minipli@...glemail.com>
Subject: Re: [PATCH] perf/x86/intel: Mark initialization code as such

On 26 August 2014 18:49, Mathias Krause <minipli@...glemail.com> wrote:
> A few of the initialization functions are missing the __init annotation.
> Fix this and thereby allow ~680 additional bytes of code to be released
> after initialization.
>
> Signed-off-by: Mathias Krause <minipli@...glemail.com>
> ---
>  arch/x86/kernel/cpu/perf_event_intel_ds.c  |    2 +-
>  arch/x86/kernel/cpu/perf_event_intel_lbr.c |    8 ++++----
>  2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
> index 696ade311d..5625799f93 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
> @@ -1055,7 +1055,7 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
>   * BTS, PEBS probe and setup
>   */
>
> -void intel_ds_init(void)
> +void __init intel_ds_init(void)
>  {
>         /*
>          * No support for 32bit formats
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
> index 9dd2459a4c..4af10617de 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
> @@ -697,7 +697,7 @@ static const int snb_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX] = {
>  };
>
>  /* core */
> -void intel_pmu_lbr_init_core(void)
> +void __init intel_pmu_lbr_init_core(void)
>  {
>         x86_pmu.lbr_nr     = 4;
>         x86_pmu.lbr_tos    = MSR_LBR_TOS;
> @@ -712,7 +712,7 @@ void intel_pmu_lbr_init_core(void)
>  }
>
>  /* nehalem/westmere */
> -void intel_pmu_lbr_init_nhm(void)
> +void __init intel_pmu_lbr_init_nhm(void)
>  {
>         x86_pmu.lbr_nr     = 16;
>         x86_pmu.lbr_tos    = MSR_LBR_TOS;
> @@ -733,7 +733,7 @@ void intel_pmu_lbr_init_nhm(void)
>  }
>
>  /* sandy bridge */
> -void intel_pmu_lbr_init_snb(void)
> +void __init intel_pmu_lbr_init_snb(void)
>  {
>         x86_pmu.lbr_nr   = 16;
>         x86_pmu.lbr_tos  = MSR_LBR_TOS;
> @@ -753,7 +753,7 @@ void intel_pmu_lbr_init_snb(void)
>  }
>
>  /* atom */
> -void intel_pmu_lbr_init_atom(void)
> +void __init intel_pmu_lbr_init_atom(void)
>  {
>         /*
>          * only models starting at stepping 10 seems
> --
> 1.7.10.4
>

Ping.
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