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Message-ID: <CABPqkBQBVRph9+aXC6F3=QxkVXXYVH8wM4rPwKBY8dpCtf1z_A@mail.gmail.com>
Date:	Wed, 10 Sep 2014 10:37:14 +0200
From:	Stephane Eranian <eranian@...gle.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Andi Kleen <andi@...stfloor.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Ingo Molnar <mingo@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 2/2] perf, x86: Use INTEL_FLAGS_UEVENT_CONSTRAINT for PRECDIST

On Wed, Sep 10, 2014 at 9:59 AM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Wed, Sep 10, 2014 at 09:59:26AM +0200, Peter Zijlstra wrote:
>> On Tue, Sep 09, 2014 at 05:49:08PM -0700, Andi Kleen wrote:
>> > From: Andi Kleen <ak@...ux.intel.com>
>> >
>> > The earlier commit 86a04461a made near all PEBS on
>> > Sandy/IvyBridge/Haswell to reject non zero flags.
>>
>> What's magic about nehalem and westmere?
>
> And core2 and whatever else we support PEBS for, for that matter.

nhm, wsm, core2 do not have precise distribution (PREC_DIST) umask to
inst_Retired.

But as I said before, PEBS events do not support any filters. cycles
-> uops_retired:any_inv=1:cmask=1
being an exception.
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