| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Mon, 15 Sep 2014 16:51:15 -0700 From: Andrew Bresticker <abrestic@...omium.org> To: Ralf Baechle <ralf@...ux-mips.org>, Thomas Gleixner <tglx@...utronix.de>, Jason Cooper <jason@...edaemon.net> Cc: Andrew Bresticker <abrestic@...omium.org>, Jeffrey Deans <jeffrey.deans@...tec.com>, Markos Chandras <markos.chandras@...tec.com>, Paul Burton <paul.burton@...tec.com>, Qais Yousef <qais.yousef@...tec.com>, Jonas Gorski <jogo@...nwrt.org>, John Crispin <blogic@...nwrt.org>, David Daney <ddaney.cavm@...il.com>, linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org Subject: [PATCH 12/24] MIPS: Move MIPS_GIC_IRQ_BASE into platform irq.h Define a generic MIPS_GIC_IRQ_BASE which should be suitable for all current boards in <mach-generic/irq.h>. Signed-off-by: Andrew Bresticker <abrestic@...omium.org> --- arch/mips/include/asm/mach-generic/irq.h | 6 ++++++ arch/mips/include/asm/mips-boards/maltaint.h | 2 -- arch/mips/include/asm/mips-boards/sead3int.h | 2 -- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/mips/include/asm/mach-generic/irq.h b/arch/mips/include/asm/mach-generic/irq.h index 139cd20..050e18b 100644 --- a/arch/mips/include/asm/mach-generic/irq.h +++ b/arch/mips/include/asm/mach-generic/irq.h @@ -36,4 +36,10 @@ #endif /* CONFIG_IRQ_CPU */ +#ifdef CONFIG_MIPS_GIC +#ifndef MIPS_GIC_IRQ_BASE +#define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8) +#endif +#endif /* CONFIG_MIPS_GIC */ + #endif /* __ASM_MACH_GENERIC_IRQ_H */ diff --git a/arch/mips/include/asm/mips-boards/maltaint.h b/arch/mips/include/asm/mips-boards/maltaint.h index 4186606..d741628 100644 --- a/arch/mips/include/asm/mips-boards/maltaint.h +++ b/arch/mips/include/asm/mips-boards/maltaint.h @@ -10,8 +10,6 @@ #ifndef _MIPS_MALTAINT_H #define _MIPS_MALTAINT_H -#define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8) - /* * Interrupts 0..15 are used for Malta ISA compatible interrupts */ diff --git a/arch/mips/include/asm/mips-boards/sead3int.h b/arch/mips/include/asm/mips-boards/sead3int.h index 2320331..11ebec9 100644 --- a/arch/mips/include/asm/mips-boards/sead3int.h +++ b/arch/mips/include/asm/mips-boards/sead3int.h @@ -14,6 +14,4 @@ #define GIC_BASE_ADDR 0x1b1c0000 #define GIC_ADDRSPACE_SZ (128 * 1024) -#define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8) - #endif /* !(_MIPS_SEAD3INT_H) */ -- 2.1.0.rc2.206.gedb03e5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists