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Date:	Mon, 15 Sep 2014 18:18:13 +0200
From:	Stephane Eranian <>
To:	Andi Kleen <>
Cc:	LKML <>,
	Peter Zijlstra <>,
	"" <>, "Liang, Kan" <>
Subject: Re: [PATCH] perf/x86/uncore: update support for client uncore IMC PMU

On Mon, Sep 15, 2014 at 5:58 PM, Andi Kleen <> wrote:
> On Mon, Sep 15, 2014 at 04:38:32PM +0200, Stephane Eranian wrote:
> >
> > This patch restructures the memory controller (IMC) uncore
> > PMU support for client SNB/IVB/HSW processors. The main change
> > is that it can now cope with more than one PCI device ID per
> > processor model. There are many flavors of memory controllers
> > for each processor. They have different PCI device ID, yet
> > they behave the same w.r.t. the memory controller PMU that
> > we are interested in.
> >
> > The patch now supports two distinct memory controllers for IVB
> > processors: one for mobile, one for desktop.
> I haven't investigated yet, but on my Lenovo ULT Haswell laptop
> the IMC PCI-ID doesn't exist, so the driver doesn't initialize.
This updates makes it easier to add new PCI-IDs. I don't have all of
them. I don't have all the HW combinations.

> So either it's the BIOS disabling it, or it's a different ID there
> too.
I bet it is a different ID.
Now, this patch still has a PCI-ID table per-processor and not a global table.
I debated this for a while. But I don't know if a PCI-ID can be used
for something
else on another platform.

> BTW any reason you didn't enable the CBOX/ARB PMUs originally for HSW?
> At least ARB events are useful for some things.
I have never looked at the ARB events. If they work like on SNB/IVB, then they
should be easy to enable.

> -Andi
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