lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <541759DB.8090408@gmail.com>
Date:	Mon, 15 Sep 2014 23:27:55 +0200
From:	Tomasz Figa <tomasz.figa@...il.com>
To:	Russell King - ARM Linux <linux@....linux.org.uk>,
	Tomasz Figa <t.figa@...sung.com>
CC:	linux-samsung-soc@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Kukjin Kim <kgene.kim@...sung.com>, lauraa@...eaurora.org,
	linux-omap@...r.kernel.org, linus.walleij@...aro.org,
	santosh.shilimkar@...com, tony@...mide.com, drake@...lessm.com,
	Marek Szyprowski <m.szyprowski@...sung.com>, loeliger@...il.com
Subject: Re: [PATCH v4 5/7] ARM: EXYNOS: Add .write_sec outer cache callback
 for L2C-310

>> +static void exynos_l2_write_sec(unsigned long val, unsigned reg)
>> +{
>> +	switch (reg) {
>> +	case L2X0_CTRL:
>> +		if (val & L2X0_CTRL_EN)
>> +			exynos_smc(SMC_CMD_L2X0INVALL, 0, 0, 0);
> 
> If we're calling this with the cache already enabled, presumably you're
> doing this to cover the case where we're disabling the cache.

Can we ever call this with L2X0_CTRL_EN set in val, while the cache is
already enabled?

Anyway, calling of this firmware operation is necessary before enabling
the cache and this code is here to cover this requirement. Whether this
function simply invalidates the cache or does something else is unknown
to me, as all the information I got is that this needs to be done.

> 
> 1. Do you really want to *invalidate* the L2 cache, discarding its
>    contents?
> 2. Don't you think that... if you needed something like this here, then
>    it could be a defficiency in the common code?
> 
> If (2) doesn't apply, then should be a comment here why this is needed.
> 

This is a quirk specific to Exynos firmware and I suspect it doesn't
even have anything to do with cache invalidation, but rather some
internal logic inside the firmware.

I agree, though, that a comment might be useful here.

Best regards,
Tomasz
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ