linux-kernel - Re: [PATCH v4 4/7] ARM: l2c: Add support for overriding prefetch settings

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Message-ID: <20140919183007.GG29620@piout.net>
Date:	Fri, 19 Sep 2014 20:30:07 +0200
From:	Alexandre Belloni <alexandre.belloni@...e-electrons.com>
To:	Russell King - ARM Linux <linux@....linux.org.uk>
Cc:	Tomasz Figa <t.figa@...sung.com>,
	linux-samsung-soc@...r.kernel.org,
	Kukjin Kim <kgene.kim@...sung.com>, lauraa@...eaurora.org,
	tony@...mide.com, linus.walleij@...aro.org,
	linux-kernel@...r.kernel.org, drake@...lessm.com,
	loeliger@...il.com, santosh.shilimkar@...com,
	linux-omap@...r.kernel.org, Tomasz Figa <tomasz.figa@...il.com>,
	linux-arm-kernel@...ts.infradead.org,
	Marek Szyprowski <m.szyprowski@...sung.com>
Subject: Re: [PATCH v4 4/7] ARM: l2c: Add support for overriding prefetch
 settings

On 19/09/2014 at 17:39:32 +0100, Russell King - ARM Linux wrote :
> On Fri, Sep 19, 2014 at 11:50:01AM +0200, Alexandre Belloni wrote:
> > On 26/08/2014 at 16:17:57 +0200, Tomasz Figa wrote :
> > > Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch
> > > settings configured in registers leading to crashes if L2C is enabled
> > > without overriding them. This patch introduces bindings to enable
> > > prefetch settings to be specified from DT and necessary support in the
> > > driver.
> > > 
> > > Signed-off-by: Tomasz Figa <t.figa@...sung.com>
> > 
> > Tested-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
> > 
> > It is working and useful on Atmel's sama5d4 were the bootloader is not
> > configuring the L2C prefetch. However, I'm wondering whether we should
> > add support for setting L310_PREFETCH_CTRL_DATA_PREFETCH and
> > L310_PREFETCH_CTRL_INSTR_PREFETCH. I'm currently doing it by using
> > ".l2c_aux_val    = L310_AUX_CTRL_DATA_PREFETCH |
> > L310_AUX_CTRL_INSTR_PREFETCH" (those are the same bits) but this has the
> > disadvantage of displaying the "L2C: platform modifies aux control
> > register:" twice.
> 
> The L2C documentation, freely available from the ARM infocentre website,
> has the answer to this for you.
> 
> The two bits in the prefetch control register which control the data
> and instruction prefetching are aliases of the aux control register.
> If you set them to a value in one register, they are reflected in the
> other.
> 
> The reason for that is that once the L2 cache is enabled, writes to
> the aux control register are no longer permitted, but it's safe to
> enable and disable the prefetching with the cache already enabled.
> This reason is even stated in the documentation.
> 

Yeah, so my question still holds, should we have an other way to
enable/disable I/D prefetch by adding two other DT bindings ?


-- 
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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