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Message-ID: <20140920121904.GB3850@katana>
Date: Sat, 20 Sep 2014 14:19:05 +0200
From: Wolfram Sang <wsa@...-dreams.de>
To: Addy Ke <addy.ke@...k-chips.com>
Cc: max.schwarz@...ine.de, heiko@...ech.de, olof@...om.net,
dianders@...omium.org, linux-i2c@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, cf@...k-chips.com,
xjq@...k-chips.com, huangtao@...k-chips.com, zyw@...k-chips.com,
yzq@...k-chips.com, hj@...k-chips.com, kever.yang@...k-chips.com,
hl@...k-chips.com, caesar.wang@...k-chips.com,
zhengsq@...k-chips.com
Subject: Re: [PATCH v2] i2c: rk3x: fix divisor calculation for SCL frequency
On Mon, Sep 08, 2014 at 11:38:25AM +0800, Addy Ke wrote:
> I2C_CLKDIV register descripted in the previous version of
> RK3x chip manual is incorrect. Plus 1 is required.
>
> The correct formula:
> - T(SCL_HIGH) = T(PCLK) * (CLKDIVH + 1) * 8
> - T(SCL_LOW) = T(PCLK) * (CLKDIVL + 1) * 8
> - (SCL Divsor) = 8 * ((CLKDIVL + 1) + (CLKDIVH + 1))
> - SCL = PCLK / (CLK Divsor)
>
> It will be updated to the latest version of chip manual.
>
> Signed-off-by: Addy Ke <addy.ke@...k-chips.com>
Applied to for-next, thanks!
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