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Message-ID: <5429DA95.80505@codeaurora.org>
Date: Mon, 29 Sep 2014 15:17:57 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Kumar Gala <galak@...eaurora.org>, devicetree@...r.kernel.org
CC: broonie@...nel.org, lee.jones@...aro.org,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Russell King <linux@....linux.org.uk>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
arm@...nel.org, linux-arm-msm@...r.kernel.org,
bjorn.andersson@...ymobile.com
Subject: Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support
On 09/29/14 02:14, Srinivas Kandagatla wrote:
> @@ -246,6 +247,24 @@
> #reset-cells = <1>;
> };
>
> + apcs: syscon@...1000 {
> + compatible = "syscon";
> + reg = <0x2011000 0x1000>;
> + };
This is actually a clock controller block that hw designers decided was
good place to shove the ipc bits (because there's room!). Can we call it
l2cc: clock-controller@...1000 {
compatible = "syscon";
reg = <0x2011000 0x1000>;
};
Eventually I'll add the specific krait compatible when we merge krait
clock support:
l2cc: clock-controller@...1000 {
compatible = "qcom,kpss-gcc", "syscon";
reg = <0x2011000 0x1000>;
clock-output-names = "acpu_l2_aux";
};
> +
> + rpm@...000 {
> + compatible = "qcom,rpm-apq8064";
> + reg = <0x108000 0x1000>;
> + qcom,ipc = <&apcs 0x8 2>;
There are actually 3 ipc bits. I guess if we ever have to use the other
two we'll extend this binding to have the other bits specified some
other way?
--
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