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Date:	Mon, 06 Oct 2014 20:44:35 +0200
From:	Arnd Bergmann <arnd@...db.de>
To:	Matthew Garrett <mjg59@...f.ucam.org>
Cc:	Suravee Suthikulanit <suravee.suthikulpanit@....com>,
	catalin.marinas@....com, will.deacon@....com,
	linux-arm-kernel@...ts.infradead.org, linux-acpi@...r.kernel.org,
	mark.rutland@....com, graeme.gregory@...aro.org,
	marc.zyngier@....com, rjw@...ysocki.net,
	linux-kernel@...r.kernel.org, astone@...hat.com,
	grant.likely@...aro.org, hanjun.guo@...aro.org,
	Sudeep.Holla@....com, olof@...om.net, jason@...edaemon.net,
	"Duran, Leo" <leo.duran@....com>, Jon Masters <jcm@...hat.com>
Subject: Re: [PATCH 1/4] ata: ahci_platform: Add ACPI support for AMD Seattle SATA controller

On Monday 06 October 2014 19:21:53 Matthew Garrett wrote:
> On Mon, Oct 06, 2014 at 08:19:37PM +0200, Arnd Bergmann wrote:
> 
> > Interesting. Does this also define a way to get access to registers
> > that are normally in PCI config space, provided they are accessible at
> > all?
> 
> Unfortunately not. I'd assume that PM registers are expected to be 
> accessed via the _PS* methods instead. Does MSI make sense outside the 
> context of PCI interrupts?

Yes, the ARM GIC has a weird sense of what MSI is used for, and
apparently some SoC vendors have started using MSI by default for
all on-chip peripherals.

A patch series to extend MSI to platform devices is currently
under review.

	Arnd
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