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Message-ID: <CAD=FV=URpegr4xZ8fVf4AmKYWg2_UtS-nsQibuaXddio3xMNig@mail.gmail.com>
Date: Tue, 7 Oct 2014 10:11:54 -0700
From: Doug Anderson <dianders@...omium.org>
To: Kever Yang <kever.yang@...k-chips.com>
Cc: Heiko Stübner <heiko@...ech.de>,
Mike Turquette <mturquette@...aro.org>,
Sonny Rao <sonnyrao@...omium.org>,
Addy Ke <addy.ke@...k-chips.com>,
Eddie Cai <cf@...k-chips.com>, Jianqun Xu <xjq@...k-chips.com>,
han jiang <hj@...k-chips.com>,
Tao Huang <huangtao@...k-chips.com>,
戴克霖 (Jack) <dkl@...k-chips.com>,
Russell King <linux@....linux.org.uk>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Kumar Gala <galak@...eaurora.org>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
linux-rockchip@...ts.infradead.org,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 0/2] init some clock rate from dts for rk3288
Kever,
On Tue, Oct 7, 2014 at 2:33 AM, Kever Yang <kever.yang@...k-chips.com> wrote:
> This patch add init rate for PLLs and some bus clock from dts for rk3288,
> add two clock rate of 400M and 500M into rate table for we will use it.
In the cover letter you should probably mention that your series won't
work properly unless <https://patchwork.kernel.org/patch/5038781/> is
applied. When I don't have that patch then "aclk_cpu" doesn't get set
properly.
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