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Date:	Thu, 9 Oct 2014 16:04:02 +0200
From:	Nicolas Ferre <nicolas.ferre@...el.com>
To:	Geert Uytterhoeven <geert@...ux-m68k.org>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>
CC:	Russell King <linux@....linux.org.uk>,
	Vinod Koul <vinod.koul@...el.com>,
	Laurent Pinchart <laurent.pinchart@...asonboard.com>,
	Dan Williams <dan.j.williams@...el.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	<dmaengine@...r.kernel.org>, "Arnd Bergmann" <arnd@...db.de>,
	Antoine Ténart 
	<antoine@...e-electrons.com>,
	Thomas Petazzoni <thomas@...e-electrons.com>,
	Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
	Boris Brezillon <boris@...e-electrons.com>,
	Matt Porter <matt.porter@...aro.org>,
	"Gregory Clement" <gregory.clement@...e-electrons.com>
Subject: Re: [PATCH v2 2/2] Documentation: dmaengine: Add a documentation
 for the dma controller API

On 09/10/2014 15:39, Geert Uytterhoeven :
> On Tue, Oct 7, 2014 at 4:52 PM, Maxime Ripard
> <maxime.ripard@...e-electrons.com> wrote:
>>>>> +These various types will also affect how the source and destination
>>>>> +addresses change over time, as DMA_SLAVE transfers will usually have
>>>>> +one of the addresses that will increment, while the other will not,
>>>>> +DMA_CYCLIC will have one address that will loop, while the other, will
>>>>
>>>> s/the other,/the other/
>>>>
>>>>> +not change, etc.
>>>
>>> This is a little bit vague in my opinion. And usually, it is pretty
>>> implementation specific.
>>
>> Which is why we can't really be more precise. If you have any other
>> wording coming to your mind, I'm all for it :)
> 
> Perhaps:
> 
> Addresses pointing to RAM are typically incremented (or decremented) after
> each transfer. In case of a ring buffer, they may loop (DMA_CYCLIC).
> Addresses pointing to a device's register (e.g. a FIFO) are typically fixed.

+1 ;-)

Bye,
-- 
Nicolas Ferre
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