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Message-Id: <1413294539-22069-4-git-send-email-sboyd@codeaurora.org>
Date: Tue, 14 Oct 2014 06:48:59 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Russell King <linux@....linux.org.uk>
Cc: Stepan Moskovchenko <stepanm@...eaurora.org>,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Will Deacon <will.deacon@....com>,
Rob Clark <robdclark@...il.com>
Subject: [PATCH v2 3/3] arm: vfp: Bounce undefined instructions in vectored mode
From: Stepan Moskovchenko <stepanm@...eaurora.org>
Certain ARM CPU implementations (e.g. Cortex-A15) may not raise a
floating- point exception whenever deprecated short-vector VFP
instructions are executed. Instead these instructions are treated
as UNALLOCATED. Change the VFP exception handling code to emulate
short-vector instructions even if FPEXC exception bits are not
set.
Signed-off-by: Stepan Moskovchenko <stepanm@...eaurora.org>
Tested-by: Will Deacon <will.deacon@....com>
Signed-off-by: Stephen Boyd <sboyd@...eaurora.org>
---
arch/arm/vfp/vfphw.S | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index cda654cbf2c2..f74a8f7e5f84 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -197,6 +197,12 @@ look_for_VFP_exceptions:
tst r5, #FPSCR_IXE
bne process_exception
+ tst r5, #FPSCR_LENGTH_MASK
+ beq skip
+ orr r1, r1, #FPEXC_DEX
+ b process_exception
+skip:
+
@ Fall into hand on to next handler - appropriate coproc instr
@ not recognised by VFP
--
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