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Date:	Mon, 20 Oct 2014 20:44:44 -0700
From:	zyw@...k-chips.com
To:	Heiko Stuebner <heiko@...ech.de>
Cc:	Mike Turquette <mturquette@...aro.org>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	dianders@...omium.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, Kumar Gala <galak@...eaurora.org>,
	Russell King <linux@....linux.org.uk>,
	linux-rockchip@...ts.infradead.org,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Chris Zhong <zyw@...k-chips.com>,
	Mark Rutland <mark.rutland@....com>,
	linux-arm-kernel@...ts.infradead.org,
	Linus Walleij <linus.walleij@...aro.org>,
	Tony Xie <xxx@...k-chips.com>
Subject: [PATCH v3 5/6] ARM: rockchip: Add pmu-sram binding

From: Chris Zhong <zyw@...k-chips.com>

The pmu-sram is used to store resume code, suspend/resume need get the
address of it. Therefore add a binding and documentation for it.

Signed-off-by: Tony Xie <xxx@...k-chips.com>
Signed-off-by: Chris Zhong <zyw@...k-chips.com>
---

Changes in v3: None
Changes in v2: None

 .../devicetree/bindings/arm/rockchip/pmu-sram.txt  |   15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt

diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt b/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
new file mode 100644
index 0000000..77284c0
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
@@ -0,0 +1,15 @@
+Rockchip SRAM for pmu:
+------------------------------
+
+The sram of pmu is used to store the function of resume from maskrom(the 1st
+level loader).
+
+Required node properties:
+- compatible : should be "rockchip,rk3288-pmu-sram"
+- reg : physical base address and the size of the registers window
+
+Example:
+	pmu_intmem@...20000 {
+		compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
+		reg = <0xff720000 0x4000>;
+	};
-- 
1.7.9.5

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