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Message-ID: <87wq7pd5sw.fsf@ashishki-desk.ger.corp.intel.com>
Date:	Fri, 24 Oct 2014 15:13:19 +0300
From:	Alexander Shishkin <alexander.shishkin@...ux.intel.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
	Robert Richter <rric@...nel.org>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Mike Galbraith <efault@....de>,
	Paul Mackerras <paulus@...ba.org>,
	Stephane Eranian <eranian@...gle.com>,
	Andi Kleen <ak@...ux.intel.com>, kan.liang@...el.com,
	adrian.hunter@...el.com, acme@...radead.org
Subject: Re: [PATCH v5 12/20] x86: perf: intel_pt: Intel PT PMU driver

Peter Zijlstra <peterz@...radead.org> writes:

> On Fri, Oct 24, 2014 at 11:22:20AM +0300, Alexander Shishkin wrote:
>> > The fact that the hardware cannot even tell you the supported mask is
>> > further fail.
>
>> The problem with this is that some bits go in groups, there'd be 2..3..4
>> bit fields encoding desired packet frequency, for example.
>
> OK, so put the magic number in the big model array.

I'm not sure I follow. These bits are reserved for the future, they can
potentially be whatever combinations of whatever. If we want to probe
around for valid combinations is to check everything in the range of
0..2^43 (or something like that, the region reserved for packet enables)
and store all the valid ones, which sounds crazy.

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