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Message-ID: <20141024130228.GM3219@twins.programming.kicks-ass.net>
Date:	Fri, 24 Oct 2014 15:02:28 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc:	Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
	Robert Richter <rric@...nel.org>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Mike Galbraith <efault@....de>,
	Paul Mackerras <paulus@...ba.org>,
	Stephane Eranian <eranian@...gle.com>,
	Andi Kleen <ak@...ux.intel.com>, kan.liang@...el.com,
	adrian.hunter@...el.com, acme@...radead.org
Subject: Re: [PATCH v5 12/20] x86: perf: intel_pt: Intel PT PMU driver

On Fri, Oct 24, 2014 at 03:13:19PM +0300, Alexander Shishkin wrote:
> Peter Zijlstra <peterz@...radead.org> writes:
> 
> > On Fri, Oct 24, 2014 at 11:22:20AM +0300, Alexander Shishkin wrote:
> >> > The fact that the hardware cannot even tell you the supported mask is
> >> > further fail.
> >
> >> The problem with this is that some bits go in groups, there'd be 2..3..4
> >> bit fields encoding desired packet frequency, for example.
> >
> > OK, so put the magic number in the big model array.
> 
> I'm not sure I follow. These bits are reserved for the future, they can
> potentially be whatever combinations of whatever. If we want to probe
> around for valid combinations is to check everything in the range of
> 0..2^43 (or something like that, the region reserved for packet enables)
> and store all the valid ones, which sounds crazy.

I was assuming that the accepted bits are model specific, and we have
this big model switch statement in perf_event_intel.c:intel_pmu_init(),
so why not have something like x86_pmu.pt_magic_bitmask = 0xf00d in
there?

No need to probe in that case. That is the same thing we do for all
unenumerated model specific things.
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