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Message-ID: <20141028130448.GH3274@tassilo.jf.intel.com>
Date:	Tue, 28 Oct 2014 06:04:48 -0700
From:	Andi Kleen <ak@...ux.intel.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	mingo@...nel.org, tglx@...utronix.de, eranian@...gle.com,
	dzickus@...hat.com, andi@...stfloor.org, jmario@...hat.com,
	acme@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] perf,x86: De-obfuscate HSW offcore bits

On Tue, Oct 28, 2014 at 01:30:44PM +0100, Peter Zijlstra wrote:
> Andi introduced the HSW cache events array, but used magic constants
> against convention as set by all the other uarchs. Try and deobfuscate
> these a bit.
> 
> The SDM doesn't appear to come close to actually describing the
> offcore but Andi said actual bit definitions were available from:
>   https://download.01.org/perfmon/HSW/Haswell_matrix_bit_definitions_V14.json
> 
> The below script was used to generate the macros.

I already have a script to generate. It can be extended to 
generate the macros.

However again please test the events and only submit them if they 
work. The tested bits I used are all documents in the previous
comments. Anything that differs now needs to be retested by you.

-Andi

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