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Message-ID: <20141028131055.GI3274@tassilo.jf.intel.com>
Date: Tue, 28 Oct 2014 06:10:55 -0700
From: Andi Kleen <ak@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: mingo@...nel.org, tglx@...utronix.de, eranian@...gle.com,
dzickus@...hat.com, andi@...stfloor.org, jmario@...hat.com,
acme@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] perf,x86: Add HSW offcore NUMA events
On Tue, Oct 28, 2014 at 01:30:46PM +0100, Peter Zijlstra wrote:
> Based on the actual HSW offcore bits, we can construct the full NODE
> event set in a similar manner to the other uarchs (NHM/SNB).
The better way is to use
MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM
MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM
directly. These support PEBS too and have various other advantages.
-Andi
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