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Message-ID: <CALCETrW5iJWd65Ems6F3RZL+CxYrQ75nDyFFmgA52ky--pzwTQ@mail.gmail.com>
Date: Mon, 27 Oct 2014 20:57:36 -0700
From: Andy Lutomirski <luto@...capital.net>
To: Hillf Danton <hillf.zj@...baba-inc.com>
Cc: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Vince Weaver <vince@...ter.net>,
Paul Mackerras <paulus@...ba.org>,
Kees Cook <keescook@...omium.org>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Andrea Arcangeli <aarcange@...hat.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Valdis Kletnieks <Valdis.Kletnieks@...edu>
Subject: Re: [PATCH v2 7/8] x86, perf: Only allow rdpmc if a perf_event is mapped
On Mon, Oct 27, 2014 at 8:35 PM, Hillf Danton <hillf.zj@...baba-inc.com> wrote:
>> -----Original Message-----
>> From: Andy Lutomirski [mailto:luto@...capital.net]
>> Sent: Monday, October 27, 2014 11:45 PM
>> To: Hillf Danton
>> Cc: Peter Zijlstra; Ingo Molnar; Vince Weaver; Paul Mackerras; Kees Cook; Arnaldo Carvalho de Melo; Andrea Arcangeli; linux-
>> kernel@...r.kernel.org; Valdis Kletnieks
>> Subject: Re: [PATCH v2 7/8] x86, perf: Only allow rdpmc if a perf_event is mapped
>>
> CPU D CPU A
> switch_mm
> load_mm_cr4
> x86_pmu_event_unmapped
>
> I wonder if the X86_CR4_PCE set on CPU D is
> cleared by CPU A by broadcasting IPI.
>
It should be okay. The IPI does:
+ if (current->mm)
+ load_mm_cr4(current->mm);
which refers to the current task running on the targetted CPU, not to
the IPI sender's task. So, if it happens after a context switch, it
will harmlessly reload the new task's cr4.
refresh_pce can't happen in between switch_mm and updating current,
since irqs are off for the entire duration of the context switch.
--Andy
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