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Message-ID: <007e01cff264$bce6afc0$36b40f40$@alibaba-inc.com>
Date:	Tue, 28 Oct 2014 12:07:43 +0800
From:	"Hillf Danton" <hillf.zj@...baba-inc.com>
To:	"'Andy Lutomirski'" <luto@...capital.net>
Cc:	"'Peter Zijlstra'" <peterz@...radead.org>,
	"'Ingo Molnar'" <mingo@...hat.com>,
	"'Vince Weaver'" <vince@...ter.net>,
	"'Paul Mackerras'" <paulus@...ba.org>,
	"'Kees Cook'" <keescook@...omium.org>,
	"'Arnaldo Carvalho de Melo'" <acme@...nel.org>,
	"'Andrea Arcangeli'" <aarcange@...hat.com>,
	<linux-kernel@...r.kernel.org>,
	"'Valdis Kletnieks'" <Valdis.Kletnieks@...edu>
Subject: RE: [PATCH v2 7/8] x86, perf: Only allow rdpmc if a perf_event is mapped

> >> Subject: Re: [PATCH v2 7/8] x86, perf: Only allow rdpmc if a perf_event is mapped
> >>
> > CPU D                   CPU A
> > switch_mm
> > load_mm_cr4
> >                         x86_pmu_event_unmapped
> >
> > I wonder if the X86_CR4_PCE set on CPU D is
> > cleared by CPU A by broadcasting IPI.
> >
> 
> It should be okay.  The IPI does:
> 
> +       if (current->mm)
> +               load_mm_cr4(current->mm);
> 
> which refers to the current task running on the targetted CPU, not to
> the IPI sender's task.  So, if it happens after a context switch, it
> will harmlessly reload the new task's cr4.
>
Right, but prev != next is checked in switch_mm.
 
Hillf


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