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Message-ID: <5457C6EA.3080809@intel.com>
Date: Mon, 03 Nov 2014 10:18:18 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Masanari Iida <standby24x7@...il.com>, corbet@....net,
linux-kernel@...r.kernel.org, linux-mm@...ck.org,
lcapitulino@...hat.com
Subject: Re: [PATCH] Documentation: vm: Add 1GB large page support information
On 10/31/2014 09:01 AM, Masanari Iida wrote:
> --- a/Documentation/vm/hugetlbpage.txt
> +++ b/Documentation/vm/hugetlbpage.txt
> @@ -2,7 +2,8 @@
> The intent of this file is to give a brief summary of hugetlbpage support in
> the Linux kernel. This support is built on top of multiple page size support
> that is provided by most modern architectures. For example, i386
> -architecture supports 4K and 4M (2M in PAE mode) page sizes, ia64
> +architecture supports 4K and 4M (2M in PAE mode) page sizes, x86_64
> +architecture supports 4K, 2M and 1G (SandyBridge or later) page sizes. ia64
> architecture supports multiple page sizes 4K, 8K, 64K, 256K, 1M, 4M, 16M,
> 256M and ppc64 supports 4K and 16M. A TLB is a cache of virtual-to-physical
> translations. Typically this is a very scarce resource on processor.
I wouldn't mention SandyBridge. Not all x86 CPUs are Intel. :)
Also, what of the Intel CPUs like the Xeon Phi or the Atom cores? I
have an IvyBridge (>= Sandybridge) mobile CPU in this laptop which does
not support 1G pages.
I would axe the i386-specific reference and just say something generic like:
For example, x86 CPUs normally support 4K and 2M (1G sometimes).
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