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Date:	Tue, 4 Nov 2014 09:36:39 +0100
From:	Matthias Brugger <matthias.bgg@...il.com>
To:	Arnd Bergmann <arnd@...db.de>
Cc:	HC Yen <hc.yen@...iatek.com>, "Joe. C" <yingjoe.chen@...iatek.com>,
	Rob Herring <robh+dt@...nel.org>, arm@...nel.org,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Russell King <linux@....linux.org.uk>,
	Olof Johansson <olof@...om.net>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	srv_heupstream <srv_heupstream@...iatek.com>,
	Yingjoe Chen <yingjoe.chen@...il.com>,
	huang eddie <eddie.huang@...iatek.com>,
	Nathan Chung <nathan.chung@...iatek.com>,
	Yuhau Chen <yh.chen@...iatek.com>,
	Sascha Hauer <kernel@...gutronix.de>
Subject: Re: [PATCH v4 1/8] ARM: mediatek: Add basic support for mt8127

2014-11-04 8:39 GMT+01:00 Arnd Bergmann <arnd@...db.de>:
> On Tuesday 04 November 2014 14:36:45 HC Yen wrote:
>> > > +
>> > > +#include <dt-bindings/interrupt-controller/irq.h>
>> > > +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> > > +#include "skeleton64.dtsi"
>> >
>> > Cortex a7 is 32 bits, right? So why do you use skeleton64.dtsi?
>>
>> Cortex-A7 is 32-bit, but that doesn't mean it can only have 32-bit
>> physical address.  With LPAE enabled, we can have physical address more
>> than 32 bits.
>>
>> The main difference between "skeleton64.dtsi" and "skeleton.dtsi" is
>> "#address-cells" property set to 2.  Although there are few sources
>> using "skeleton64.dtsi", some of them write "#address-cells = <2>"
>> directly in order to have 64-bit address space.  ARM's TC2 reference
>> platform (vexpress-v2p-ca15_a7.dts) is an example.
>>
>> Some of MediaTek ARMv7 SoCs support address space larger than 4GB. It
>> will be convenient to share the sources if we all use 64-bit device
>> tree.
>
> Right, in general, I'd use #address-cells=<2> for Cortex-A7/A15/A17.

Alright, thanks for clarification. So we should use skeleton64.dtsi
for mt6589 as well, right?

>
>         Arnd



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