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Date:	Mon, 10 Nov 2014 14:11:44 -0800
From:	Kevin Cernekee <>
To:	Kevin Hilman <>
Cc:	Thomas Gleixner <>,
	Jason Cooper <>,,
	Florian Fainelli <>,
	Ralf Baechle <>,
	Sergei Shtylyov <>,
	"" <>,
	"" <>,
	Maxime Bizon <>,
	Jonas Gorski <>,
	Linux MIPS Mailing List <>,,,
	Olof Johansson <>, Arnd Bergmann <>
Subject: Re: [PATCH V4 04/14] genirq: Generic chip: Add big endian I/O accessors

On Mon, Nov 10, 2014 at 2:00 PM, Kevin Hilman <> wrote:
> Kevin Cernekee <> writes:
>> Use io{read,write}32be if the caller specified IRQ_GC_BE_IO when creating
>> the irqchip.
>> Signed-off-by: Kevin Cernekee <>
> I bisected a couple ARM boot failures in next-20141110 on atmel sama5 platforms down to
> this patch, though I'm not quite yet sure how it's causing the failure.
> I'm not getting any console output, so haven't been able to dig deeper
> yet.  Maybe the atmel maintainers (Cc'd) can help dig.
> I've confirmed that reverting $SUBJECT patch (commit
> b79055952badbd73710685643bab44104f2509ea2) on top of next-20141110 gets
> things booting again.
> Also, it only happens with sama5_defconfig, not with multi_v7_defconfig.

In drivers/irqchip/irq-atmel-aic-common.c I see:

        ret = irq_alloc_domain_generic_chips(domain, 32, 1, name,
                                             handle_level_irq, 0, 0,

and IRQCHIP_SKIP_SET_WAKE is (1 << 4), same as IRQ_GC_BE_IO.

Is it possible that the caller is passing values intended for
irq_chip->flags into a function expecting
irq_domain_chip_generic->gc_flags ?
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