linux-kernel - RE: [V5 PATCH 1/1] driver:mtd:spi-nor: Add quad I/O support for Micron spi nor

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Message-ID: <A765B125120D1346A63912DDE6D8B6315EB0DA@NTXXIAMBX02.xacn.micron.com>
Date:	Wed, 12 Nov 2014 00:58:31 +0000
From:	bpqw <bpqw@...ron.com>
To:	Graham Moore <grmoore@...nsource.altera.com>,
	Brian Norris <computersforpeace@...il.com>
CC:	Marek Vasut <marex@...x.de>,
	"dwmw2@...radead.org" <dwmw2@...radead.org>,
	"geert+renesas@...der.be" <geert+renesas@...der.be>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
	"shijie8@...il.com" <shijie8@...il.com>, bpqw <bpqw@...ron.com>
Subject: RE: [V5 PATCH 1/1] driver:mtd:spi-nor: Add quad I/O support for
 Micron spi nor

>Hi, I'm having trouble with this patch using a Cadence QSPI controller and Micron n25q00 part.

>I can use quad commands in Extended SPI mode, but I can't make this EVCR Quad mode work.


Yes,but if you use quad commands in Extended spi mode,only for Quad commands,the command line is DQ0,
Address/data line is DQ0,DQ1,DQ2 and DQ3(1-x-4). 
But if in Quad I/O mode,for all the commands,the command/address/data line will be 4,they are DQ0,DQ1,DQ2 and DQ3(4-x-4).

>The Cadence QSPI Controller has fields to configure the quad transfer, and can support quad opcode, 
>quad address, and quad data, or some combination.  There is a chart in the docs which shows the combinations for various read commands.

>Problem is, I've tried all of the combinations and all I get is FF with this EVCR patch.

This maybe your spi controller is still extended mode, 
Once EVCR bit 7 is set to 0, the spi nor device will operate in quad I/O.Command-address-data line is 4-x-4.
So after send WRITE EVCR command , spi controller also  must transfer to quad I/O Mode,and set its Command-address-data line also
Should be 4-x-4 .

>If I don't set the quad mode in the EVCR, then I can use quad read commands no problem.
Yes,you don't set the quad mode in the EVCR,you can use quad read commands,but this patch is for enable Micron SPI nor Quad I/O mode,
If you want to enable it ,you must set EVCR.

>Bottom line, with the Cadence QSPI controller, if I use quad commands in Extended SPI mode, then all good.  If I use this EVCR quad mode, then all bad.

>Anybody else have a Cadence QSPI controller and using EVCR quad mode successfully?

>Thanks,
>Graham Moore

Hi,Brian

Whether this patch can be merged?thanks.
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