linux-kernel - RE: [V5 PATCH 1/1] driver:mtd:spi-nor: Add quad I/O support for Micron spi nor

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Message-ID: <A765B125120D1346A63912DDE6D8B6315EB0E1@NTXXIAMBX02.xacn.micron.com>
Date:	Wed, 12 Nov 2014 01:19:18 +0000
From:	bpqw <bpqw@...ron.com>
To:	Jagan Teki <jagannadh.teki@...il.com>,
	Graham Moore <grmoore@...nsource.altera.com>,
	Brian Norris <computersforpeace@...il.com>
CC:	bpqw <bpqw@...ron.com>, Marek Vasut <marex@...x.de>,
	"geert+renesas@...der.be" <geert+renesas@...der.be>,
	"shijie8@...il.com" <shijie8@...il.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
	"dwmw2@...radead.org" <dwmw2@...radead.org>
Subject: RE: [V5 PATCH 1/1] driver:mtd:spi-nor: Add quad I/O support for
 Micron spi nor

>I have almost verified all the micros parts for operating quad mode and the quad enable bit is 
>volatile by default and no need to set it on software.

>Why this code is meant for - does micron has changed this bit operation on newly added parts?

>thanks!
>--
>Jagan.

For Micron Spi norflash,if you want to make it work Quad I/O mode,you can do it by set
Two registers,Nonvolatile Configuration resister(NVCR) and Enhanced volatile confuration register(EVCR),
but according to spi-nor.c,and micron spi nor,we recommend that if want to enable Micron spi nor Quad I/O
mode,the best way is to set EVCR.
Of course,you can use Quad/Dual operation command to read/write Micron spi nor in the spi nor Extended I/O mode.
But their command-address-data is different.

The purpose of this patch is only to enable Micron spi nor Quad I/O mode,if want to make Micron spi nor work 
Under Quad I/O mode.

Hi,Brian

How about this patch?Please give me some tips,thanks.