lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20141118174310.GM28279@e104818-lin.cambridge.arm.com>
Date:	Tue, 18 Nov 2014 17:43:11 +0000
From:	Catalin Marinas <catalin.marinas@....com>
To:	Stephen Boyd <sboyd@...eaurora.org>
Cc:	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Mark Rutland <Mark.Rutland@....com>,
	Måns Rullgård <mans@...sr.com>,
	Russell King <linux@....linux.org.uk>,
	"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
	Will Deacon <Will.Deacon@....com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [RFC/PATCH] ARM: Expose cpuid registers to userspace

Stephen,

On Tue, Oct 28, 2014 at 01:19:12AM +0000, Stephen Boyd wrote:
> Exporting all the different possible configurations of CPUID
> registers to userspace via hwcaps is going to explode the hwcaps.
> Emulate userspace cpuid register accesses and export a new
> "cpuid" hwcap instead so that userspace can know to try to
> read the cpuid registers itself.

Since there is a parallel thread with the musl guys around CPU feature
detection, I thought I would reply to your patch as well (I missed it
when it first posted as I was on holiday).

First of all, not all the features are relevant to user space, so we
need to make sure the hwcap bits explosion is actually real. If it is
real (I personally doubt it), we should only expose those fields which
are relevant to user space - ID_ISAR*, part of ID_PFR*.

The second issue is that you don't want to expose features which the
kernel does not support (e.g. Neon disabled, crypto would also not be
supported; debug/PMU is another example). So masking or downgrading bit
fields is necessary.

Thirdly, there are reserved bits in the CPUID registers which we don't
want to expose. What if you run an older kernel on a newer hardware
which actually has something to those bits but the kernel doesn't
support them?

Fourthly, there is an auxiliary feature register (ID_AFR0) which is
implementation defined. I'm not sure what user space could do with this.
It needs to be read in combination with MIDR to make any sense but even
though you can't tell before whether the kernel should expose such
information to users.

And lastly, there are big.LITTLE systems, so the kernel needs to provide
a common set of features.

-- 
Catalin
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ