lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1437548.SPtpsDgD8I@diego>
Date:	Wed, 19 Nov 2014 19:46:18 +0100
From:	Heiko Stübner <heiko@...ech.de>
To:	Doug Anderson <dianders@...omium.org>
Cc:	Linus Walleij <linus.walleij@...aro.org>,
	Sonny Rao <sonnyrao@...omium.org>,
	Dmitry Torokhov <dmitry.torokhov@...il.com>,
	Chris Zhong <zyw@...k-chips.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] pinctrl: rockchip: Fix enable/disable/mask/unmask

Am Mittwoch, 19. November 2014, 09:54:13 schrieb Doug Anderson:
> Hi,
> 
> On Tue, Nov 18, 2014 at 3:49 PM, Doug Anderson <dianders@...omium.org> 
wrote:
> > +static void rockchip_irq_disable(struct irq_data *d)
> > +{
> > +       struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
> > +       u32 val;
> > +
> > +       irq_gc_lock(gc);
> > +       val = irq_reg_readl(gc, GPIO_INTEN);
> > +       irq_reg_writel(gc, val & ~d->mask, GPIO_INTEN);
> > +       irq_gc_unlock(gc);
> > +}
> 
> Off list, Dmitry asked me why I didn't use irq_gc_mask_disable_reg()
> and irq_gc_unmask_enable_reg() (AKA why I coded up my own function
> here).  Originally I tried to use irq_gc_mask_disable_reg() and
> irq_gc_unmask_enable_reg().  ..but they're really not designed to work
> in tandem with the irq_gc_mask_set_bit() and irq_gc_mask_clr_bit().
> 
> Specifically if you try to use one set of functions for your
> mask/unmask and the other for your disable/enable you'll find that
> they stomp on each other.  Both functions upkeep the exact same
> "mask_cache" variable.
> 
> Personally I'm totally baffled by how irq_gc_mask_disable_reg() and
> irq_gc_unmask_enable_reg() could actually be sane, but that's maybe a
> topic for another discussion. 

I don't think irq_gc_mask_disable_reg and irq_gc_unmask_enable_reg are meant 
as callbacks for irq_enable/irq_disable. As the name implies they are 
standardized callbacks for irq_mask/irq_unmask on machines using a different 
scheme for masking. So I would expected that they operate on the same 
mask_cache because both types of functions handle masking on different types of 
interrupt controllers.

There don't seem to be any generalized callbacks for irq_enable/irq_disable 
themself, probably because machines do the most uncommon things there :-)


Heiko
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ