linux-kernel - Re: [PATCH] x86: Intel Cache Allocation Technology support

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Message-ID: <20141123192613.GA2956@console-pimps.org>
Date:	Sun, 23 Nov 2014 19:26:13 +0000
From:	Matt Fleming <matt@...sole-pimps.org>
To:	Thomas Gleixner <tglx@...utronix.de>
Cc:	Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
	linux-kernel@...r.kernel.org, vikas.shivappa@...el.com,
	hpa@...or.com, mingo@...nel.org, tj@...nel.org,
	matt.fleming@...el.com, will.auld@...el.com, peterz@...radead.org
Subject: Re: [PATCH] x86: Intel Cache Allocation Technology support

On Fri, 21 Nov, at 03:19:52PM, Thomas Gleixner wrote:
> > +		barrier();
> > +		cqe_genable = true;
> 
> What's the exact point of that barrier?
 
Yes, this definitely needs documenting. Vikas?

> > +
> > +/*
> > + * Tests if only contiguous bits are set.
> > + */
> > +
> > +static inline bool cbm_iscontiguous(unsigned long var)
> > +{
> 
> This one here can be implemented with existing bitmap functions as
> well.

Something like this?

	first_bit = find_next_bit(map, nr_bits, -1);
	zero_bit = find_next_zero_bit(map, nr_bits, first_bit);

	if (find_next_bit(map, nr_bits, zero_bit) < nr_bits)
		return -EINVAL;	/* non-contiguous bits */

-- 
Matt Fleming, Intel Open Source Technology Center
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