lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Tue, 25 Nov 2014 20:35:25 +0900
From:	Tomasz Figa <tomasz.figa@...il.com>
To:	Krzysztof Kozlowski <k.kozlowski@...sung.com>
Cc:	Mike Turquette <mturquette@...aro.org>,
	Sylwester Nawrocki <s.nawrocki@...sung.com>,
	Kukjin Kim <kgene@...nel.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	Javier Martinez Canillas <javier.martinez@...labora.co.uk>,
	Vivek Gautam <gautam.vivek@...sung.com>,
	Kevin Hilman <khilman@...nel.org>
Subject: Re: [RFC 2/2] clk: samsung: Fix clock disable failure because domain
 being gated

Hi Krzysztof,

Please see my comments inline.

2014-11-25 0:18 GMT+09:00 Krzysztof Kozlowski <k.kozlowski@...sung.com>:
> +static int audss_clk_gate_enable(struct clk_hw *hw)
> +{
> +       int ret;
> +
> +       if (!IS_ERR(pll_in))
> +               clk_prepare_enable(pll_in);

Calling clk_prepare_enable() from enable() callback doesn't look like
a good idea, because enabling is not supposed to sleep, while
preparing might do so.

I guess you have to pre-prepare this clock in probe and then only call
enable here.

> +       ret = clk_gate_ops.enable(hw);
> +       if (!IS_ERR(pll_in))
> +               clk_disable_unprepare(pll_in);
> +
> +       return ret;
> +}

[snip]

> +/* TODO: Also mux and div */
> +const struct clk_ops audss_clk_gate_ops = {

nit: static const probably?

> +       .enable = audss_clk_gate_enable,
> +       .disable = audss_clk_gate_disable,
> +       .is_enabled = audss_clk_gate_is_enabled,
> +};

As for the approach itself, maybe you should simply register fully
custom clocks with clk_register(), without altering
clk_register_gate() at all and simply calling gate ops whenever
necessary? I don't know, just a loose idea.

By the way, this issue could be probably solved by integrating generic
clocks with regmap API, since regmap-mmio can automatically control a
clock.

Best regards,
Tomasz
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ