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Date:	Tue, 25 Nov 2014 22:16:07 +0800
From:	"zhichang.yuan" <zhichang.yuan@...aro.org>
To:	Catalin Marinas <catalin.marinas@....com>
CC:	Will Deacon <Will.Deacon@....com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linuxarm@...wei.com" <linuxarm@...wei.com>,
	"linaro-kernel@...ts.linaro.org" <linaro-kernel@...ts.linaro.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH v1] arm64:mm: An optimization about kernel direct
 sapce mapping


On 2014年11月25日 01:17, Catalin Marinas wrote:
> Hi,
>
> I'm trying to make some sense of this patch, so questions below:
>
> On Wed, Nov 19, 2014 at 02:21:55PM +0000, zhichang.yuan@...aro.org wrote:
>> From: "zhichang.yuan" <zhichang.yuan@...aro.org>
>>
>> This patch make the processing of map_mem more common and support more
>> discrete memory layout cases.
>>
>> In current map_mem, the processing is based on two hypotheses:
>> 1) no any early page allocations occur before the first PMD or PUD regime
>> where the kernel image locate is successfully mapped;
> No because we use the kernel load offset to infer the start of RAM
> (PHYS_OFFSET). This would define which memory you can allocate.
I note that the current PHYS_OFFSET is 0x8000,0000 in JUNO, 0x4000,0000 in QEMU.  I think the current
processing like that:
the booloader load the kernel image at (PHYS_OFFSET + TEXT_OFFSET), and vmlinux.lds.S define the VMA of image
as (. = PAGE_OFFSET + TEXT_OFFSET). So, the starting RAM physical address, PHYS_OFFSET, correspond to
PAGE_OFFSET now.( this is my inference, have not investigate the UEFI)


But is it possible in the future the kernel image is loaded to a memory range that is not the first memblock,
such as :

block 0: 0x100000, 0x20100000
block 1: 0x40000000, 0x40000000

Supposed the block 1 is where the kernel image locate.


Actually, if bootloader put the kernel image at a configurable physical address named as PA, and VMA of text
section is defined as PAGE_OFFSET + 0x100000 + PA, then PAGE_OFFSET will correspond to 0x100000.

In x86, the VMA of text section is as below:

#ifdef CONFIG_X86_32
        . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
#else
        . = __START_KERNEL;
#endif

LOAD_PHYSICAL_ADD is configurable. I think it can support different hardware design.


I am not sure whether this case will happen.

>> 2) there are sufficient available pages in the PMD or PUD regime to satisfy
>> the need of page tables from other memory ranges mapping.
> I don't fully understand this. Can you be more specific?
>
Supposed this memory layout:

block 0: 0x40000000, 0xc00000
block 1: 0x60000000, 0x1f000000
block 2: 0x80000000, 0x40000000

if the end of kernel image is near to 0xc00000, it is possible no available mapped pages for other blocks
mapping.

Of-course, this is a very special case, not practical, since the memblock where the kernel image locate should
be big enough.

>> The current SOC or hardware platform designs had not broken this constraint.
>> But we can make the software more versatile.
> We need to have code readability in mind ;).
>
>> In addition, for the 4K page system, to comply with the constraint No.1, the
>> start address of some memory ranges is forced to align at PMD boundary, it
>> will make some marginal pages of that ranges are skipped to build the PTE. It
>> is not reasonable.
> It is reasonable to ask for the start of RAM to be on a PMD (2MB)
> boundary.
I think the physical address where the kernel image locate can be limited on PMD boundary. But the start of
RAM is decided by Soc or hardware platform. For example, the start of RAM only align to MB boundary.
>> This patch will relieve the system from those constraints. You can load the
>> kernel image in any memory range, the memory range can be small, can start at
>> non-alignment boundary, and so on.
> I guess you still depend on the PAGE_OFFSET, TEXT_OFFSET, so it's not
> random.
>
> I'm not sure what the end goal is with this patch but my plan is to
> entirely decouple TEXT_OFFSET from PAGE_OFFSET (with a duplicate mapping
> for the memory covering the kernel text). This would allow us to load
> the kernel anywhere in RAM (well, with some sane alignment to benefit
> from section mapping) and the PHYS_OFFSET detected from DT at run-time.
> Once that's done, I don't think your patch is necessary.
>
> Thanks.


I am not so clear what is the coupling between TEXT_OFFSET and PAGE_OFFSET. It seems the VMA and LMA have some
coupling.

PHYS_OFFSET + TEXT_OFFSET <------------> PAGE_OFFSET + TEXT_OFFSET.

I am not sure what situation will be happened on the SOC design or application, that is the reason why i
submit as RFC.
If the cases i described do not need to think about or can not exist, this RFC can be skipped.


Thanks,
-Zhichang
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