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Message-ID: <5477D99C.3050903@realsil.com.cn>
Date:	Fri, 28 Nov 2014 02:10:36 +0000
From:	敬锐 <micky_ching@...lsil.com.cn>
To:	Dan Carpenter <dan.carpenter@...cle.com>
CC:	"sameo@...ux.intel.com" <sameo@...ux.intel.com>,
	"lee.jones@...aro.org" <lee.jones@...aro.org>,
	"chris@...ntf.net" <chris@...ntf.net>,
	"ulf.hansson@...aro.org" <ulf.hansson@...aro.org>,
	"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
	"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	王炜 <wei_wang@...lsil.com.cn>,
	"rogerable@...ltek.com" <rogerable@...ltek.com>,
	"devel@...uxdriverproject.org" <devel@...uxdriverproject.org>
Subject: Re: [PATCH 1/2] mfd: rtsx: add func to split u32 into register


On 11/27/2014 11:23 PM, Dan Carpenter wrote:
>> +static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val)
>> >+{
>> >+	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg,     0xFF, val >> 24);
>> >+	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16);
>> >+	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 8);
>> >+	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val);
> This assumes the cpu is little endian.  First convert to big endian
> using cpu_to_be32() and then write it out.
>
> 	__be32 be_val = cpu_to_be32()
>
> 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg,     0xFF, be_val);
> 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, be_val >> 8);
> 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, be_val >> 16);
> 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, be_val >> 24);
>
> (Written hurredly in my mail client.  May be wrong).
>
I think we better not use cpu_to_be32() here, leave the work to caller
may be better.

eg, in sd_ops.c the cmd.arg is constructed bit by bit, we can put the right
byte to the right register by shift, so the endian check is not need.

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