[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <D09EA4E8.A828%suravee.suthikulpanit@amd.com>
Date: Fri, 28 Nov 2014 16:42:04 +0000
From: "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@....com>
To: Arnd Bergmann <arnd@...db.de>
CC: "olof@...om.net" <olof@...om.net>,
"mark.rutland@....com" <mark.rutland@....com>,
"will.deacon@....com" <will.deacon@....com>,
"marc.zyngier@....com" <marc.zyngier@....com>,
"catalin.marinas@....com" <catalin.marinas@....com>,
"robherring2@...il.com" <robherring2@...il.com>,
"liviu.dudau@....com" <liviu.dudau@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"arm@...nel.org" <arm@...nel.org>,
"Lendacky, Thomas" <Thomas.Lendacky@....com>,
"Schopp, Joel" <Joel.Schopp@....com>
Subject: Re: [PATCH V5] arm64: amd-seattle: Adding device tree for AMD
Seattle platform
On 11/28/14, 22:13, "Arnd Bergmann" <arnd@...db.de> wrote:
>On Wednesday 26 November 2014, suravee.suthikulpanit@....com wrote:
>> From: Suravee Suthikulpanit <Suravee.Suthikulpanit@....com>
>>
>> Initial revision of device tree for AMD Seattle Development platform.
>>
>> Cc: Arnd Bergmann <arnd@...db.de>
>> Cc: Marc Zyngier <marc.zyngier@....com>
>> Cc: Mark Rutland <mark.rutland@....com>
>> Cc: Will Deacon <will.deacon@....com>
>> Cc: Catalin Marinas <catalin.marinas@....com>
>> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@....com>
>> Signed-off-by: Thomas Lendacky <Thomas.Lendacky@....com>
>> Signed-off-by: Joel Schopp <Joel.Schopp@....com>
>> ---
>> V5 Changes:
>> * Rebase to arm-soc for-next (per Olof)
>> * Restructure the DTS/DTSI into board and SoC configurations (per
>>Olof)
>> * Add model property at the top level (per Olof)
>> * Move pcie0 under smb and change smb's ranges property to empty
>>since pcie
>> is not in the same range. (per Olof)
>> * Change v2m0's ranges property (per Arnd)
>> * Change timer interrupt type to level-trigger (per Marc)
>
>Applied to next/arm64, thanks!
Thank you
>
>Looking at this one more time, I had another question:
>
>> + smb0: smb {
>> + compatible = "simple-bus";
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + /* DDR range is 40-bit addressing */
>> + dma-ranges = <0x80 0x0 0x80 0x0 0x7f 0xffffffff>;
>> +
>
>What is a DDR range?
>
>Also, what is special about the last byte? Did you intentionally
>leave it out? I think when we calculate the dma mask, we will
>use 0x3fffffffff so we don't step on the last byte, which I assume
>is not what you intended.
>
> Arnd
Hm..probably not then. What I meant is to specify 40-bit addressing for
the memory range starting
from [0x80_0000_0000 - 0x100_0000_0000).
As, I discussed with you on IRC, it should also cover the V2m MSI register
frame, and should be starting from
0. The fix should then be:
dma-ranges = <0 0 0 0 0x100 0x00000000>
I will send a patch out to fix and add better comment for this.
Thanks,
Suravee
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists