linux-kernel - Re: [PATCH v3 2/2] i2c: cadence: Check for errata condition involving master receive

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Date:	Fri, 5 Dec 2014 14:03:21 +0530
From:	rajeev kumar <rajeevkumar.linux@...il.com>
To:	Harini Katakam <harinik@...inx.com>
Cc:	wsa@...-dreams.de, mark.rutland@....com, michal.simek@...inx.com,
	soren.brinkmann@...inx.com,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>, linux-i2c@...r.kernel.org,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Harini Katakam <harinikatakamlinux@...il.com>,
	Vishnu Motghare <vishnum@...inx.com>
Subject: Re: [PATCH v3 2/2] i2c: cadence: Check for errata condition involving
 master receive

On Fri, Dec 5, 2014 at 1:38 PM, Harini Katakam <harinik@...inx.com> wrote:
> Cadence I2C controller has the following bugs:
> - completion indication is not given to the driver at the end of
> a read/receive transfer with HOLD bit set.
> - Invalid read transaction are generated on the bus when HW timeout
> condition occurs with HOLD bit set.
>
> As a result of the above, if a set of messages to be transferred with
> repeated start includes any transfer following a read transfer,
> completion is never indicated and timeout occurs.
> Hence a check is implemented to return -EOPNOTSUPP for such sequences.
>
> Signed-off-by: Harini Katakam <harinik@...inx.com>
> Signed-off-by: Vishnu Motghare <vishnum@...inx.com>
> ---
>
> v3:
> Add warning in case of unsupported transfer.
>

Reviewed-by: Rajeev Kumar <rajeevkumar.linux@...il.com>

> v2:
> Dont defeteature repeated start. Just check for unsupported conditions in the
> driver and return error.
>
> ---
>  drivers/i2c/busses/i2c-cadence.c |   15 +++++++++++++++
>  1 file changed, 15 insertions(+)
>
> diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c
> index 5f5d4fa..3ea3b7a 100644
> --- a/drivers/i2c/busses/i2c-cadence.c
> +++ b/drivers/i2c/busses/i2c-cadence.c
> @@ -541,6 +541,21 @@ static int cdns_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
>          * processed with a repeated start.
>          */
>         if (num > 1) {
> +               /*
> +                * This controller does not give completion interrupt after a
> +                * master receive transfer if HOLD bit is set (repeated start),
> +                * resulting in SW timeout. Hence, if a receive transfer is
> +                * followed by any other transfer, an error is returned
> +                * indicating that this sequence is not supported.
> +                */
> +               for (count = 0; count < num-1; count++) {
> +                       if (msgs[count].flags & I2C_M_RD)
> +                               dev_warn(adap->dev.parent,
> +                                       "No support for repeated start when\t");
> +                               dev_warn(adap->dev.parent,
> +                                       "receive is followed by a transfer\n");
> +                               return -EOPNOTSUPP;
> +               }
>                 id->bus_hold_flag = 1;
>                 reg = cdns_i2c_readreg(CDNS_I2C_CR_OFFSET);
>                 reg |= CDNS_I2C_CR_HOLD;
> --
> 1.7.9.5
>
> --
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