linux-kernel - Re: [PATCH 00/14] MIPS: OCTEON: Some partial support for Octeon III

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <54907952.7030504@gmail.com>
Date:	Tue, 16 Dec 2014 10:26:26 -0800
From:	David Daney <ddaney.cavm@...il.com>
To:	Aleksey Makarov <feumilieu@...il.com>,
	Aaro Koskinen <aaro.koskinen@....fi>,
	Ralf Baechle <ralf@...ux-mips.org>
CC:	linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
	David Daney <david.daney@...ium.com>,
	Aleksey Makarov <aleksey.makarov@...iga.com>
Subject: Re: [PATCH 00/14] MIPS: OCTEON: Some partial support for Octeon III

On 12/15/2014 10:03 AM, Aleksey Makarov wrote:
> These patches fix some issues in the Cavium Octeon code and
> introduce some partial support for Octeon III and little-endian.
>

We will be sending a second revision of these to improve the patches as 
per some of feedback received.

David Daney


> Aleksey Makarov (1):
>    MIPS: OCTEON: Delete unused COP2 saving code
>
> Chandrakala Chavva (1):
>    MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register
>
> David Daney (12):
>    MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs
>    MIPS: OCTEON: Fix FP context save.
>    MIPS: OCTEON: Save and restore CP2 SHA3 state
>    MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.h
>    MIPS: OCTEON: Implement the core-16057 workaround
>    MIPS: OCTEON: Don't do acknowledge operations for level triggered
>      irqs.
>    MIPS: OCTEON: Add ability to used an initrd from a named memory block.
>    MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h
>    MIPS: OCTEON: Implement DCache errata workaround for all CN6XXX
>    MIPS: OCTEON: Update octeon-model.h code for new SoCs.
>    MIPS: OCTEON: Add register definitions for OCTEON III reset unit.
>    MIPS: OCTEON: Handle OCTEON III in csrc-octeon.
>
>   arch/mips/cavium-octeon/csrc-octeon.c              |  10 +
>   arch/mips/cavium-octeon/octeon-irq.c               |  45 ++-
>   arch/mips/cavium-octeon/setup.c                    |  81 +++-
>   arch/mips/include/asm/bootinfo.h                   |   1 +
>   .../asm/mach-cavium-octeon/kernel-entry-init.h     |  22 +
>   arch/mips/include/asm/mach-cavium-octeon/war.h     |   3 +
>   arch/mips/include/asm/octeon/cvmx-rst-defs.h       | 441 +++++++++++++++++++++
>   arch/mips/include/asm/octeon/octeon-model.h        |  65 ++-
>   arch/mips/include/asm/octeon/octeon.h              | 148 +++++--
>   arch/mips/include/asm/processor.h                  |   8 +-
>   arch/mips/include/asm/ptrace.h                     |   4 +-
>   arch/mips/kernel/asm-offsets.c                     |   1 +
>   arch/mips/kernel/octeon_switch.S                   | 218 ++++++----
>   arch/mips/kernel/setup.c                           |  19 +-
>   arch/mips/mm/uasm.c                                |   2 +-
>   15 files changed, 935 insertions(+), 133 deletions(-)
>   create mode 100644 arch/mips/include/asm/octeon/cvmx-rst-defs.h
>

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/