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Date:	Wed, 24 Dec 2014 09:13:32 -0800
From:	Andy Lutomirski <>
To:	Pavel Machek <>
Cc:	kernel list <>
Subject: Re: DRAM unreliable under specific access patern

On Wed, Dec 24, 2014 at 8:38 AM, Pavel Machek <> wrote:
> Hi!
> It seems that it is easy to induce DRAM bit errors by doing repeated
> reads from adjacent memory cells on common hw. Details are at
> . Older memory modules seem to work better, and ECC should detect
> this. Paper has inner loop that should trigger this.
> Workarounds seem to be at hardware level, and tricky, too.

One mostly-effective solution would be to stop buying computers
without ECC.  Unfortunately, no one seems to sell non-server chips
that can do ECC.

> Does anyone have implementation of detector? Any ideas how to work
> around it in software?

Platform-dependent page coloring with very strict, and impossible to
implement fully correctly, page allocation constraints?


>                                                                         Pavel
> --
> (english)
> (cesky, pictures)

Andy Lutomirski
AMA Capital Management, LLC
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