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Message-ID: <20141230170445.GP17800@sirena.org.uk>
Date:	Tue, 30 Dec 2014 17:04:45 +0000
From:	Mark Brown <broonie@...nel.org>
To:	Chris Zhong <zyw@...k-chips.com>
Cc:	heiko@...ech.de, dianders@...omium.org,
	linux-rockchip@...ts.infradead.org,
	Liam Girdwood <lgirdwood@...il.com>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/2] regulator: rk808: add dvs support

On Tue, Dec 30, 2014 at 11:07:14AM +0800, Chris Zhong wrote:
> On 12/30/2014 01:25 AM, Mark Brown wrote:

> >So, this seems a bit odd.  What we appear to be doing here is
> >alternating between the two different voltage setting registers which is
> >all well and good but makes me wonder why we're bothering - it's a bit
> >more work than just sticking with one.  We do get...

> you mean check the old_selector and selector? I think
> _regulator_do_set_voltage have done it.

No, I mean that we may as well just always write to the same register
and save a bunch of code.

> >...this but unless the voltage typically ramps much faster than spec
> >it's never clear to me that we're actually winning by polling the pin
> >instead of just dead reckoning the time, it's more work for the CPU to
> >poll the GPIO than to sleep after all.

> Actually, it's slower than spec, so I think getting this dvsok pin state
> is safer than delay.

Well, that suggests that the spec is wrong which ought to be fixed
anyway oughtn't it?  Or are you saying that the delay is inconsistent as
well as slower than advertised?

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