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Message-ID: <CA+55aFzhgnHipD_mAA6qp9bum2b_j_7_3uWN4MHtwh6y20krcg@mail.gmail.com>
Date:	Sat, 10 Jan 2015 13:08:33 -0800
From:	Linus Torvalds <torvalds@...ux-foundation.org>
To:	Andy Lutomirski <luto@...capital.net>
Cc:	Denys Vlasenko <vda.linux@...glemail.com>,
	Borislav Petkov <bp@...en8.de>,
	Denys Vlasenko <dvlasenk@...hat.com>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Oleg Nesterov <oleg@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	X86 ML <x86@...nel.org>, Alexei Starovoitov <ast@...mgrid.com>,
	Will Drewry <wad@...omium.org>,
	Kees Cook <keescook@...omium.org>
Subject: Re: [PATCH 3/4] x86: open-code register save/restore in
 trace_hardirqs thunks

On Sat, Jan 10, 2015 at 12:17 PM, Andy Lutomirski <luto@...capital.net> wrote:
>
> I asked this once, and someone told me that push/pop has lower
> throughput.  I find this surprising.

It was true for some AMD CPU's in particular. One insn/cycle vs two.

I personally would be very happy to go back to push/pop sequences.
Even without a fancy stack engine like Intel has done for a while,
even *simple* cores can generally pair pushes and pops. I think the
original Pentium already had a special magic pairing logic to pair
pushes and pops despite both instructions using %esp. It's a common
and fairly trivial special case, and the fact that a few AMD
microarchitectures didn't do it is likely not really a good reason to
avoid repeated push/pop instructions.

                   Linus
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