linux-kernel - Re: [PATCH v2] usb: dwc2: call dwc2_is_controller

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Date:	Wed, 14 Jan 2015 15:46:03 -0600
From:	Felipe Balbi <balbi@...com>
To:	Alan Stern <stern@...land.harvard.edu>
CC:	Felipe Balbi <balbi@...com>,
	Robert Baldyga <r.baldyga@...sung.com>, <paulz@...opsys.com>,
	<gregkh@...uxfoundation.org>, <linux-usb@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <dinguyen@...nsource.altera.com>,
	<yousaf.kaukab@...el.com>, <m.szyprowski@...sung.com>
Subject: Re: [PATCH v2] usb: dwc2: call dwc2_is_controller_alive() under
 spinlock

Hi,

On Wed, Jan 14, 2015 at 04:41:23PM -0500, Alan Stern wrote:
> > > > This is really, really odd. Register accesses are atomic, so the lock
> > > > isn't really doing anything. Besides, you're calling
> > > > dwc2_is_controller_alive() from within the IRQ handler, so IRQs are
> > > > already disabled.
> > > 
> > > Spinlocks sometimes do more than you think.  For instance, here the 
> > > lock prevents the register access from happening while some other CPU 
> > > is holding the lock.  If a silicon quirk causes the register access to 
> > > interfere with other activities, this could be important.
> > 
> > readl() (which is used by dwc2_is_controller_alive()) adds a memory
> > barrier to the register accesses, that should force all register
> > accesses the be correctly ordered.
> 
> Memory barriers will order accesses that are all made on the same CPU
> with respect to each other.  They do not order these accesses against
> accesses made from another CPU -- that's why we have spinlocks.  :-)

a fair point :-) The register is still read-only, so that shouldn't
matter either :-)

> >  I fail to see how a silicon quirk
> > could cause this and if, indeed, it does, I'd be more comfortable with a
> > proper STARS tickect number from synopsys :-s
> 
> Maybe accessing this register somehow resets something else.  I don't
> know.  It seems unlikely, but at least it explains how adding a
> spinlock could fix the problem.

I would really need Paul (or someone at Synopsys) to confirm this
somehow. Maybe it has something to do with how the register is
implemented, dunno.

Paul, do you have any idea what could cause this ? Could the HW into
some weird state if we read GSNPSID at random locations or when data is
being transferred, or anything like that ?

-- 
balbi

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